PIC16LC74B-16 Datasheet, PDF (7/41 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D Converter

PIC16LC74B-16/PTL16
2.1 DC Characteristics: PIC16LC74B-16/PTL-04 (Commercial)
DC CHARACTERISTICS
Param Sym
No.
Characteristic
Standard Operating Conditions (unless otherwise stated)
Operating temperature 0°C ≤ TA ≤ +70°C for commercial
Min Typ† Max Units
Conditions
D001 VDD Supply Voltage
2.5 - 5.5 V RC, LP, XT, HS osc modes (DC - 4 MHz)
VBOR* - 5.5 V BOR enabled (Note 7)
D002* VDR RAM Data Retention
- TBD -
V
Voltage (Note 1)
D003 VPOR VDD Start Voltage to
-
VSS
-
V
ensure internal
Power-on Reset signal
D004* SVDD VDD Rise Rate to
0.05 -
D004A*
ensure internal
TBD -
Power-on Reset signal
- V/mS PWRT enabled (PWRTE bit clear)
- V/mS PWRT disabled (PWRTE bit set)
D005
VBOR Brown-out Reset
voltage trip point
3.65 - 4.35 V BODEN bit set
D010 IDD Supply Current
(Note 2, 5)
D010A
- 2.0 3.8 mA XT, RC osc modes
FOSC = 4 MHz, VDD = 3.0V (Note 4)
- 3.0 6.0 mA HS oscillator mode
Fosc = 16MHz, VDD = 3.0V
- 22.5 48 µA LP osc mode
FOSC = 32 kHz, VDD = 3.0V, WDT disabled
D021 IPD Power-down Current
-
0.9 5 µA VDD = 3.0V, WDT disabled, 0°C to +70°C
(Note 3, 5)
D022*
D022A*
∆IWDT
∆IBOR
Module Differential
Current (Note 6)
Watchdog Timer
Brown-out Reset
-
6.0 20 µA WDTE bit set, VDD = 4.0V
- 350 425 µA BODEN bit set, VDD = 5.0V
* These parameters are characterized but not tested.
† Data in "Typ" column is at 3V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD.
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by
the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20 µA to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6: The ∆ current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7: When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached.
© 1999 Microchip Technology Inc.
Preliminary
DS30026A-page 7