PIC16LC74B-16 Datasheet, PDF (26/41 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D Converter

PIC16LC74B-16/PTL16
FIGURE 2-18: A/D CONVERSION TIMING
BSF ADCON0, GO
1 TCY
134
(TOSC/2) (1)
131
Q4
130
A/D CLK ¹³²
A/D DATA
7
6
5
4
3
2
1
0
ADRES
OLD_DATA
NEW_DATA
ADIF
GO
SAMPLE
SAMPLING STOPPED
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This
allows the SLEEP instruction to be executed.
TABLE 2-17: A/D CONVERSION REQUIREMENTS
Param Sym
No.
Characteristic
Min
Typ†
Max Units
Conditions
130 TAD A/D clock period
2.0
—
—
µs TOSC based, VREF full range
3.0
6.0
9.0
µs A/D RC Mode
131 TCNV Conversion time (not including S/H time) 11
—
(Note 1)
Note 2 16
11
TAD
—
µs VDD = 3.0V, Temp. = 100°C,
Rs = 10KΩ
132 TACQ Acquisition time
5*
—
—
µs The minimum time is the amplifier
settling time. This may be used if
the "new" input voltage has not
changed by more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the last
sampled voltage (as stated on
CHOLD).
134 TGO Q4 to A/D clock start
—
TOSC/2
—
— If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
135 TSWC Switching from convert → sample time 1.5 §
—
—
TAD
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See A/D section for minimum requirements.
DS30026A-page 26
Preliminary
© 1999 Microchip Technology Inc.