PIC16F630_06 Datasheet, PDF (49/130 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F630/676
7.2 A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 7-3. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS)
impedance varies over the device voltage (VDD), see
Figure 7-3. The maximum recommended imped-
ance for analog sources is 10 kΩ. As the impedance
EQUATION 7-1: ACQUISITION TIME
TACQ
= Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
TC
TACQ
= TAMP + TC + TCOFF
= 2μs + TC + [(Temperature -25°C)(0.05μs/°C)]
= CHOLD (RIC + RSS + RS) In(1/2047)
= - 120pF (1kΩ + 7kΩ + 10kΩ) In(0.0004885)
= 16.47μs
= 2μs + 16.47μs + [(50°C -25°C)(0.05μs/°C)
= 19.72μs
is decreased, the acquisition time may be decreased.
After the analog input channel is selected (changed),
this acquisition must be done before the conversion
can be started.
To calculate the minimum acquisition time, Equation 7-1
may be used. This equation assumes that 1/2 LSb error
is used (1024 steps for the A/D). The 1/2 LSb error is the
maximum error allowed for the A/D to meet its specified
resolution.
To calculate the minimum acquisition time, TACQ, see
the PIC^® Mid-Range Reference Manual (DS33023).
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (CHOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin
leakage specification.
FIGURE 7-3:
ANALOG INPUT MODEL
RS ^ANx
VDD
VT = 0.6V
VA
CPIN
5 pF
VT = 0.6V
Sampling
Switch
RIC ≤ 1K ^SS RSS
I LEAKAGE
± 500 nA
CHOLD
= DAC capacitance
= 120 pF
VSS
Legend: CPIN
= input capacitance
VT
= threshold voltage
I LEAKAGE = leakage current at the pin due to
various junctions
RIC
= interconnect resistance
SS
= sampling switch
CHOLD = sample/hold capacitance (from DAC)
6V
5V
VDD 4V
3V
2V
5 6 7 8 9 10 11
Sampling Switch
(kΩ)
© 2006 Microchip Technology Inc.
DS40039D-page 47