PIC16F630_06 Datasheet, PDF (12/130 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F630/676
TABLE 2-2: PIC16F630/676 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Addr Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, Page
BOD
Bank 1
80h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx 18,61
81h
OPTION_REG _{RAPU INTEDG}
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111 12,30
82h
PCL
Program Counter's (PC) Least Significant Byte
0000 0000 17
83h
STATUS
IRP⁽²⁾
RP1⁽²⁾
RP0
TO
PD
Z
DC
C
0001 1xxx 11
84h
FSR
Indirect data memory address pointer
xxxx xxxx 18
85h
TRISA
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 19
86h
—
Unimplemented
—
—
87h
TRISC
—
—
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111
—
88h
—
Unimplemented
—
—
89h
—
Unimplemented
—
—
8Ah PCLATH
—
—
—
Write buffer for upper 5 bits of program counter
---0 0000 17
8Bh INTCON
GIE
PEIE
T0IE
INTE
RAIE
T0IF
INTF
RAIF 0000 0000 13
8Ch PIE1
EEIE
ADIE
—
—
CMIE
—
—
TMR1IE 00-- 0--0 14
8Dh
—
Unimplemented
—
—
8Eh PCON
—
—
—
—
—
—
POR
BOD
---- --qq
16
8Fh
—
—
90h
OSCCAL
91h
ANSEL⁽³⁾
CAL5
ANS7
CAL4
ANS6
CAL3
ANS5
CAL2
ANS4
CAL1
ANS3
CAL0
ANS2
—
ANS1
—
1000 00-- 16
ANS0 1111 1111 46
92h
—
Unimplemented
—
—
93h
—
Unimplemented
—
—
94h
—
Unimplemented
—
—
95h
WPUA
—
—
WPUA5 WPUA4
—
WPUA2 WPUA1 WPUA0 ^{--11 -111}
20
96h
IOCA
—
—
IOCA5
IOCA4
IOCA3
IOCA2
IOCA1
IOCA0 --00 0000
21
97h
—
Unimplemented
—
—
98h
—
Unimplemented
—
—
99h
VRCON
VREN
—
VRR
—
VR3
VR2
VR1
VR0
0-0- 0000
42
9Ah EEDAT
EEPROM data register
0000 0000 49
9Bh EEADR
—
EEPROM address register
0000 0000 49
9Ch EECON1
—
—
—
—
WRERR WREN
WR
RD
---- x000 50
9Dh EECON2
EEPROM control register 2 (not a physical register)
9Eh
ADRESL⁽³⁾
Least Significant 2 bits of the left shifted result or 8 bits of the right shifted result
9Fh
ADCON1⁽³⁾
—
ADCS2 ADCS1 ADCS0
—
—
—
---- ---- 49
xxxx xxxx 44
—
-000 ---- 45,61
Legend:
Note 1:
2:
3:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation.
IRP & RP1 bits are reserved, always maintain these bits clear.
PIC16F676 only.
DS40039D-page 10
© 2006 Microchip Technology Inc.