RFPIC12C509AG Datasheet, PDF (48/104 Pages) Microchip Technology – 18/20-Pin 8-Bit CMOS Microcontroller with UHF ASK/FSK Transmitter

rfPIC12C509AG/509AF
8.2.4 INTERNAL 4 MHz RC OSCILLATOR
The internal RC oscillator provides a fixed 4 MHz (nom-
inal) system clock at VDD = 5V and 25°C, see “Electri-
cal Specifications” section for information on variation
over voltage and temperature.
In addition, a calibration instruction is programmed into
the top of memory which contains the calibration value
for the internal RC oscillator. This location is never
code protected regardless of the code protect settings.
This value is programmed as a MOVLW XX instruction
where XX is the calibration value, and is placed at the
RESET vector. This will load the W register with the cal-
ibration value upon RESET and the PC will then roll
over to the users program at address 0x000. The user
then has the option of writing the value to the OSCCAL
Register (05h) or ignoring it.
OSCCAL, when written to with the calibration value, will
“trim” the internal oscillator to remove process variation
from the oscillator frequency.
Note:
Please note that erasing the device will
also erase the pre-programmed internal
calibration value for the internal oscillator.
The calibration value must be read prior to
erasing the part. so it can be repro-
grammed correctly later.
For the rfPIC12C509AG/509AF bits <7:2>, CAL5-
CAL0 are used for calibration. Adjusting CAL5-0 from
000000 to 111111 yields a higher clock speed. Note that
bits 1 and 0 of OSCCAL are unimplemented and
should be written as 0 when modifying OSCCAL for
compatibility with future devices.
8.3 RESET
The device differentiates between various kinds of
RESET:
a) Power-on Reset (POR)
b) MCLR Reset during normal operation
c) MCLR Reset during SLEEP
d) WDT Time-out Reset during normal operation
e) WDT Time-out Reset during SLEEP
f) Wake-up from SLEEP on pin change
Some registers are not RESET in any way; they are
unknown on POR and unchanged in any other RESET.
Most other registers are RESET to “RESET state” on
Power-on Reset (POR), MCLR, WDT or Wake-up-on-
Pin Change Reset during normal operation. They are
not affected by a WDT Reset during SLEEP or MCLR
Reset during SLEEP, since these RESETS are viewed
as resumption of normal operation. The exceptions to
this are TO, PD, and GPWUF bits. They are set or
cleared differently in different RESET situations. These
bits are used in software to determine the nature of
reset. See Table 8-3 for a full description of RESET
states of all registers.
DS70031A-page 46
Preliminary
© 2001 Microchip Technology Inc.