RFPIC12C509AG Datasheet, PDF (23/104 Pages) Microchip Technology – 18/20-Pin 8-Bit CMOS Microcontroller with UHF ASK/FSK Transmitter

rfPIC12C509AG/509AF
4.6 Program Counter
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next pro-
gram instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
mapped to PC<7:0>. Bit 5 of the STATUS register pro-
vides page information to bit 9 of the PC (Figure 4-6).
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
cleared (Figure 4-6).
Instructions where the PCL is the destination, or Modify
PCL instructions, include MOVWF PC, ADDWF PC, and
BSF PC,5.
Note:
Because PC<8> is cleared in the CALL
instruction, or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
FIGURE 4-6:
LOADING OF PC
BRANCH INSTRUCTIONS -
rfPIC12C509AG/509AF
GOTO Instruction
11 10 9 8 7
0
PC
PCL
Instruction Word
PA0
7
0
STATUS
CALL or Modify PCL Instruction
11 10 9 8 7
0
PC
PCL
Instruction Word
Reset to ‘0’
PA0
7
0
STATUS
4.6.1 EFFECTS OF RESET
The Program Counter is set upon a RESET, which
means that the PC addresses the last location in the
last page (i.e., the oscillator calibration instruction).
After executing MOVLW XX, the PC will roll over to
location 00h, and begin executing user code.
The STATUS register page preselect bits are cleared
upon a RESET, which means that page 0 is pre-
selected.
Therefore, upon a RESET, a GOTO instruction will auto-
matically cause the program to jump to page 0 until the
value of the page bits is altered.
4.7 Stack
The rfPIC12C509AG/509AF device has a 12-bit wide
L.I.F.O. hardware push/pop stack.
A CALL instruction will push the current value of stack
1 into stack 2 and then push the current program
counter value, incremented by one, into stack level 1. If
more than two sequential CALL’s are executed, only
the most recent two return addresses are stored.
A RETLW instruction will pop the contents of stack level
1 into the program counter and then copy stack level 2
contents into level 1. If more than two sequential
RETLW’s are executed, the stack will be filled with the
address previously stored in level 2. Note that the
W register will be loaded with the literal value specified
in the instruction. This is particularly useful for the
implementation of data look-up tables within the pro-
gram memory.
Upon any RESET, the contents of the stack remain
unchanged, however the program counter (PCL) will
also be Reset to 0.
Note 1: There are no STATUS bits to indicate
stack overflows or stack underflow condi-
tions.
2: There are no instructions mnemonics
called PUSH or POP. These are actions
that occur from the execution of the CALL
and RETLW instructions.
© 2001 Microchip Technology Inc.
Preliminary
DS70031A-page 21