PIC18LF4520-IPT Datasheet, PDF (399/412 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2420/2520/4420/4520
INDEX
A
A/D ....................................................................................223
Acquisition Requirements .........................................228
ADCON0 Register.....................................................223
ADCON1 Register.....................................................223
ADCON2 Register.....................................................223
ADRESH Register............................................. 223, 226
ADRESL Register .....................................................223
Analog Port Pins, Configuring ...................................230
Associated Registers ................................................232
Configuring the Module .............................................227
Conversion Clock (TAD) ............................................229
Conversion Status (GO/DONE Bit) ...........................226
Conversions ..............................................................231
Converter Characteristics..........................................359
Converter Interrupt, Configuring................................227
Discharge ..................................................................231
Operation in Power-Managed Modes .......................230
Selecting and Configuring Acquisition Time..............229
Special Event Trigger (CCP) .....................................232
Special Event Trigger (ECCP) ..................................148
Use of the CCP2 Trigger ...........................................232
Absolute Maximum Ratings...............................................321
AC (Timing) Characteristics ..............................................340
Load Conditions for Device
Timing Specifications ........................................341
Parameter Symbology...............................................340
Temperature and Voltage Specifications ..................341
Timing Conditions .....................................................341
AC Characteristics
Internal RC Accuracy ................................................343
Access Bank
Mapping with Indexed Literal Offset Mode ..................72
ACKSTAT .......................................................................... 191
ACKSTAT Status Flag.......................................................191
ADCON0 Register .............................................................223
GO/DONE Bit ............................................................226
ADCON1 Register .............................................................223
ADCON2 Register .............................................................223
ADDFSR............................................................................ 310
ADDLW .............................................................................273
ADDULNK .........................................................................310
ADDWF .............................................................................273
ADDWFC........................................................................... 274
ADRESH Register .............................................................223
ADRESL Register...................................................... 223, 226
Analog-to-Digital Converter. See A/D.
ANDLW .............................................................................274
ANDWF .............................................................................275
Assembler
MPASM Assembler ...................................................318
Auto-Wake-up on Sync Break Character ..........................214
B
Bank Select Register (BSR) ................................................59
Baud Rate Generator ........................................................187
BC .....................................................................................275
BCF ...................................................................................276
BF ...................................................................................... 191
BF Status Flag...................................................................191
Block Diagrams
A/D............................................................................ 226
Analog Input Model ................................................... 227
Baud Rate Generator................................................ 187
Capture Mode Operation .......................................... 141
Comparator Analog Input Model ............................... 237
Comparator I/O Operating Modes ............................ 234
Comparator Output ................................................... 236
Comparator Voltage Reference ................................ 240
Comparator Voltage Reference Output
Buffer Example ................................................. 241
Compare Mode Operation ........................................ 142
Device Clock............................................................... 28
Enhanced PWM........................................................ 149
EUSART Receive ..................................................... 213
EUSART Transmit .................................................... 211
External Power-on Reset Circuit
(Slow VDD Power-up).......................................... 43
Fail-Safe Clock Monitor (FSCM) ............................... 261
Generic I/O Port........................................................ 105
High/Low-Voltage Detect with External Input ........... 244
Interrupt Logic ............................................................. 92
MSSP (I²C Master Mode) ......................................... 185
MSSP (I²C Mode) ..................................................... 170
MSSP (SPI Mode) .................................................... 161
On-Chip Reset Circuit ................................................. 41
PIC18F2420/2520....................................................... 10
PIC18F4420/4520....................................................... 11
PLL (HS Mode) ........................................................... 25
PORTD and PORTE (Parallel Slave Port) ................ 120
PWM Operation (Simplified) ..................................... 144
Reads from Flash Program Memory........................... 77
Single Comparator .................................................... 235
Table Read Operation ................................................ 73
Table Write Operation................................................. 74
Table Writes to Flash Program Memory ..................... 79
Timer0 in 16-Bit Mode .............................................. 124
Timer0 in 8-Bit Mode ................................................ 124
Timer1....................................................................... 128
Timer1 (16-Bit Read/Write Mode) ............................. 128
Timer2....................................................................... 134
Timer3....................................................................... 136
Timer3 (16-Bit Read/Write Mode) ............................. 136
Watchdog Timer ....................................................... 258
BN ..................................................................................... 276
BNC .................................................................................. 277
BNN .................................................................................. 277
BNOV................................................................................ 278
BNZ................................................................................... 278
BOR. See Brown-out Reset.
BOV .................................................................................. 281
BRA................................................................................... 279
Break Character (12-Bit) Transmit and Receive ............... 216
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ...................................................... 44
Detecting..................................................................... 44
Disabling in Sleep Mode ............................................. 44
Software Enabled ....................................................... 44
BSF ................................................................................... 279
BTFSC .............................................................................. 280
BTFSS .............................................................................. 280
BTG................................................................................... 281
BZ ..................................................................................... 282
DS39631E-page 397
© 2008 Microchip Technology Inc.