PIC16F720_13 Datasheet, PDF (246/254 Pages) Microchip Technology – 20-Pin Flash Microcontrollers

PIC16(L)F720/721
T1GCON (Timer1 Gate Control) ............................... 103
T2CON ...................................................................... 106
TRISA (Tri-State PORTA) ........................................... 46
TRISB (Tri-State PORTB) ........................................... 55
TRISC (Tri-State PORTC) .......................................... 61
TXSTA (Transmit Status and Control) ...................... 125
WPUB (Weak Pull-up PORTB) ................................... 55
Reset................................................................................... 25
Resets
Associated Registers .................................................. 34
Revision History ................................................................ 241
S
S (Start) bit ........................................................................ 157
SMP bit...................................................................... 145, 157
Software Simulator (MPLAB SIM)..................................... 183
SPBRG.............................................................................. 127
SPBRG Register ................................................................. 17
Special Event Trigger.......................................................... 78
Special Function Registers ................................................. 13
SPI Mode .......................................................................... 143
Associated Registers ................................................ 146
Typical Master/Slave Connection ............................. 137
SSP ................................................................................... 137
I²C Mode ................................................................... 147
Acknowledge..................................................... 148
Addressing ........................................................ 149
Clock Stretching................................................ 154
Clock Synchronization ...................................... 155
Firmware Master Mode ..................................... 154
Hardware Setup ................................................ 147
Multi-Master Mode ............................................ 154
Reception.......................................................... 150
Sleep Operation ................................................ 155
Start/Stop Conditions ........................................ 148
Transmission..................................................... 152
Master Mode ............................................................. 139
SPI Mode .................................................................. 137
Slave Mode ....................................................... 141
Typical SPI Master/Slave Connection....................... 137
SSPADD Register ............................................................... 17
SSPBUF Register ............................................................... 16
SSPCON Register............................................... 16, 144, 156
SSPEN bit ................................................................. 144, 156
SSPM bits ................................................................. 144, 156
SSPOV bit ................................................................. 144, 156
SSPSTAT Register ............................................. 17, 145, 157
STATUS Register................................................................ 20
Synchronous Serial Port Enable bit (SSPEN)........... 144, 156
Synchronous Serial Port Mode Select bits (SSPM) .. 144, 156
T
T1CON Register.......................................................... 16, 102
TMR1ON Bit.............................................................. 103
T1GCON Register............................................................. 103
T2CON Register.................................................. 16, 106, 146
Temperature Indicator Module ............................................ 87
Thermal Considerations .................................................... 192
Time-out Sequence............................................................. 30
Timer0 ................................................................................. 89
Associated Registers .................................................. 91
Operation .............................................................. 89, 94
Specifications ............................................................ 201
Timer1 ................................................................................. 93
Associated registers.................................................. 104
Asynchronous Counter Mode ..................................... 95
DS41430D-page 246
Reading and Writing ........................................... 95
Interrupt ...................................................................... 98
Modes of Operation .................................................... 94
Module On/Off (TMR1ON Bit)................................... 103
Operation During Sleep .............................................. 98
Prescaler .................................................................... 95
Specifications ........................................................... 201
Timer1 Gate
Selecting Source ................................................ 95
TMR1H Register ......................................................... 93
TMR1L Register.......................................................... 93
Timer2
Associated registers ................................................. 106
Timers
Timer1
T1CON ............................................................. 102
T1GCON........................................................... 103
Timer2
T2CON ............................................................. 106
Timing Diagrams
A/D Conversion......................................................... 203
A/D Conversion (Sleep Mode) .................................. 204
Asynchronous Reception.......................................... 124
Asynchronous Transmission..................................... 120
Asynchronous Transmission (Back-to-Back)............ 121
Brown-out Reset (BOR)............................................ 199
Brown-out Reset Situations ........................................ 29
CLKOUT and I/O ...................................................... 198
Clock Synchronization .............................................. 155
Clock Timing ............................................................. 196
I²C Bus Data............................................................. 209
I²C Bus Start/Stop Bits ............................................. 209
I²C Reception (7-bit Address)................................... 150
I²C Slave Mode with SEN = 0 (Reception,
10-bit Address) ................................................. 151
I²C Transmission (7-bit Address).............................. 152
INT Pin Interrupt ......................................................... 36
Slave Select Synchronization ................................... 143
SPI Master Mode ...................................................... 140
SPI Master Mode (CKE = 1, SMP = 1) ..................... 206
SPI Mode (Slave Mode with CKE = 0)...................... 142
SPI Mode (Slave Mode with CKE = 1)...................... 142
SPI Slave Mode (CKE = 0) ....................................... 206
SPI Slave Mode (CKE = 1) ....................................... 207
Synchronous Reception (Master Mode, SREN) ....... 133
Synchronous Transmission ...................................... 131
Synchronous Transmission (Through TXEN) ........... 131
Time-out Sequence
Case 1 ................................................................ 30
Case 2 ................................................................ 31
Case 3 ................................................................ 31
Timer0 and Timer1 External Clock ........................... 200
Timer1 Incrementing Edge ......................................... 98
USART Synchronous Receive (Master/Slave) ......... 205
USART Synchronous Transmission (Master/Slave). 204
Wake-up from Interrupt............................................. 168
Timing Parameter Symbology .......................................... 193
Timing Requirements
I²C Bus Data............................................................. 210
I2C Bus Start/Stop Bits ............................................. 209
SPI Mode .................................................................. 208
TMR0 Register.................................................................... 16
TMR1H Register ................................................................. 16
TMR1L Register.................................................................. 16
TMR2 Register.................................................................... 16
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