PIC18F14K22LIN Datasheet, PDF (16/62 Pages) Microchip Technology – 20-Pin Flash Microcontrollers 20-Pin Flash Microcontrollers

PIC18F14K22LIN
TABLE 2-2: REGISTER FILE SUMMARY (PIC18F14K22LIN) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on POR,
BOR
TMR0H
Timer0 Register, High Byte
0000 0000
TMR0L
Timer0 Register, Low Byte
xxxx xxxx
T0CON
TMR0ON
T08BIT
T0CS
T0SE
PSA
T0PS2
T0PS1
T0PS0
1111 1111
OSCCON
IDLEN
IRCF2
IRCF1
IRCF0
OSTS
HFIOFS
SCS1
SCS0
0011 qq00
OSCCON2
—
—
—
—
—
PRI_SD
HFIOFL
LFIOFS
---- -10x
WDTCON
—
—
—
—
—
—
—
SWDTEN
--- ---0
RCON
IPEN
SBOREN⁽¹⁾
—
RI
TO
PD
POR
BOR
0q-1 11q0
TMR1H
Timer1 Register, High Byte
xxxx xxxx
TMR1L
Timer1 Register, Low Bytes
xxxx xxxx
T1CON
RD16
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN
T1SYNC
TMR1CS TMR1ON 0000 0000
TMR2
Timer2 Register
0000 0000
PR2
Timer2 Period Register
1111 1111
T2CON
SSPBUF⁽³⁾
SSPADD⁽³⁾
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000
x
x
x
x
x
x
x
x
xxxx xxxx
0
0
0
0
0
0
0
0
0000 0000
SSPSTAT⁽³⁾
0
0
0
0
0
SSPCON1⁽³⁾
0
0
0
0
0
SSPCON2⁽³⁾
0
0
0
0
0
0
0
0
0000 0000
0
0
0
0000 0000
0
0
0
0000 0000
ADRESH
A/D Result Register, High Byte
xxxx xxxx
ADRESL
A/D Result Register, Low Byte
xxxx xxxx
ADCON0
—
—
CHS3
CHS2
CHS1
CHS0
GO/DONE ADON
--00 0000
ADCON1
—
—
—
—
PVCFG1
PVCFG0
NVCFG1 NVCFG0
---- 0000
ADCON2
ADFM
—
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0
0-00 0000
CCPR1H
Capture/Compare/PWM Register 1, High Byte
xxxx xxxx
CCPR1L
Capture/Compare/PWM Register 1, Low Byte
xxxx xxxx
CCP1CON
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1 CCP1M0
0000 0000
VREFCON2
—
—
—
DAC1R4
DAC1R3
DAC1R2
DAC1R1 DAC1R0
---0 0000
VREFCON1
D1EN
D1LPS
DAC1OE
---
D1PSS1
D1PSS0
—
D1NSS
000- 00-0
VREFCON0 ^FVR1EN
FVR1ST
FVR1S1 FVR1S0
—
—
—
—
0001 ----
PSTRCON
—
BAUDCON⁽³⁾ ABDOVF
—
RCIDL
—
STRSYNC
STRD
0
0
BRG16
STRC
—
STRB
WUE
STRA
ABDEN
---0 0001
0100 0-00
PWM1CON
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
0000 0000
ECCP1AS
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1
PSSAC0
PSSBD1 PSSBD0
0000 0000
TMR3H
Timer3 Register, High Byte
xxxx xxxx
TMR3L
Timer3 Register, Low Byte
xxxx xxxx
T3CON
RD16
—
T3CKPS1 T3CKPS0 T3CCP1
T3SYNC
TMR3CS TMR3ON 0-00 0000
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise it is disabled and reads as ‘0’. Refer to
DS41365, “PIC18(L)F1XK22 Data Sheet”, Section 21.4 “Brown-out Reset (BOR)” for additional information
The RA3 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0). Otherwise, RA3 reads as ‘0’. This bit
is read-only.
Rows highlighted in black show required values for normal LIN protocol applications.
DS41580A-page 20
Preliminary
 2011 Microchip Technology Inc.