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PIC18F14K22LIN Datasheet, PDF (14/62 Pages) Microchip Technology – 20-Pin Flash Microcontrollers 20-Pin Flash Microcontrollers
PIC18F14K22LIN
TABLE 2-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18F14K22LIN DEVICES
Address
Name
Address Name Address
Name
Address Name Address
FFFh
FFEh
FFDh
FFCh
FFBh
FFAh
FF9h
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
FD7h
FD6h
FD5h
FD4h
FD3h
FD2h
FD1h
TMR0H
TMR0L
T0CON
—(2)
OSCCON
OSCCON2
WDTCON
FAFh
FAEh
FADh
FACh
FABh
FAAh
FA9h
SPBRG
RCREG
TXREG
TXSTA(3)
RCSTA(3)
EEADRH
EEADR
F87h
F86h
F85h
F84h
F83h
F82h
F81h
—(2)
—(2)
—(2)
—(2)
—(2)
PORTC(3)
PORTB(3)
F5Fh
F5Eh
F5Dh
F5Ch
F5Bh
F5Ah
F59h
FF8h
FF7h
TBLPTRU
TBLPTRH
FD0h
FCFh
RCON
TMR1H
FA8h EEDATA
FA7h EECON2(1)
F80h PORTA
F7Fh ANSELH(3)
F58h
F57h
FF6h
FF5h
FF4h
FF3h
TBLPTRL
TABLAT
PRODH
PRODL
FCEh
FCDh
FCCh
FCBh
TMR1L
T1CON
TMR2
PR2
FA6h
FA5h
FA4h
FA3h
EECON1
—(2)
—(2)
—(2)
F7Eh
F7Dh
F7Ch
F7Bh
ANSEL
—(2)
—(2)
—(2)
F56h
F55h
F54h
F53h
FF2h INTCON
FF1h INTCON2
FF0h
FEFh
FEEh
FEDh
FECh
FEBh
INTCON3
INDF0(1)
POSTINC0(1)
POSTDEC0(1)
PREINC0(1)
PLUSW0(1)
FEAh FSR0H
FE9h FSR0L
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
WREG
INDF1(1)
POSTINC1(1)
POSTDEC1(1)
PREINC1(1)
PLUSW1(1)
FE2h FSR1H
FE1h FSR1L
FE0h
FDFh
FDEh
FDDh
FDCh
FDBh
BSR
INDF2(1)
POSTINC2(1)
POSTDEC2(1)
PREINC2(1)
PLUSW2(1)
FDAh FSR2H
FD9h FSR2L
FD8h STATUS
FCAh
FC9h
FC8h
FC7h
FC6h
FC5h
T2CON
SSPBUF(3)
SSPADD(3)
SSPSTAT(3)
SSPCON1(3)
SSPCON2(3)
FC4h ADRESH
FC3h ADRESL
FC2h ADCON0
FC1h ADCON1
FC0h ADCON2
FBFh CCPR1H
FBEh CCPR1L
FBDh CCP1CON
FBCh VREFCON2
FBBh VREFCON1
FBAh VREFCON0
FB9h PSTRCON
FB8h BAUDCON(3)
FB7h PWM1CON
FB6h
FB5h
FB4h
ECCP1AS
—(2)
—(2)
FB3h TMR3H
FB2h TMR3L
FB1h T3CON
FB0h SPBRGH
FA2h
FA1h
FA0h
F9Fh
F9Eh
F9Dh
F9Ch
F9Bh
F9Ah
F99h
F98h
F97h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F8Fh
F8Eh
F8Dh
F8Ch
F8Bh
F8Ah
F89h
F88h
IPR2
PIR2
PIE2
IPR1(3)
PIR1(3)
PIE1(3)
—(2)
OSCTUNE
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
TRISC(3)
TRISB(3)
TRISA
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
LATC(3)
LATB(3)
LATA
—(2)
F7Ah
F79h
F78h
F77h
F76h
F75h
F74h
F73h
F72h
F71h
F70h
F6Fh
F6Eh
F6Dh
F6Ch
F6Bh
F6Ah
F69h
F68h
F67h
F66h
F65h
F64h
F63h
F62h
F61h
F60h
IOCB
IOCA
WPUB
WPUA
SLRCON
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
SSPMASK(3)
—(2)
CM1CON0
CM2CON1
CM2CON0
—(2)
SRCON1
SRCON0
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
Legend: = Unimplemented data memory locations, read as ‘0’,
Note 1: This is not a physical register.
2: Unimplemented registers are read as ‘0’.
3: Registers in BOLD have functional differences. Please refer to appropriate chapters for details.
Name
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
DS41580A-page 18
Preliminary
 2011 Microchip Technology Inc.