PIC16F87XA Datasheet, PDF (120/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
FIGURE 10-5:
RX (pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
ASYNCHRONOUS RECEPTION
Start
bit _{bit 0 bit 1}
Start
bit 7/8 Stop bit bit 0
bit
Word 1
RCREG
Start
bit 7/8 Stop bit
bit
Word 2
RCREG
bit 7/8 Stop
bit
Note: This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after the third word,
causing the OERR (Overrun Error) bit to be set.
When setting up an Asynchronous Reception, follow
these steps:
1. Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH (Section 10.1 “USART Baud
Rate Generator (BRG)”).
2. Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
3. If interrupts are desired, then set enable bit
RCIE.
4. If 9-bit reception is desired, then set bit RX9.
5. Enable the reception by setting bit CREN.
6. Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE is set.
7. Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
8. Read the 8-bit received data by reading the
RCREG register.
9. If any error occurred, clear the error by clearing
enable bit CREN.
10. If using interrupts, ensure that GIE and PEIE
(bits 7 and 6) of the INTCON register are set.
TABLE 10-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address Name Bit 7
Bit 6
Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh, 8Bh, INTCON GIE
10Bh,18Bh
0Ch
PIR1
PSPIF⁽¹⁾
PEIE
ADIF
TMR0IE INTE RBIE TMR0IF INTF R0IF 0000 000x 0000 000u
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h
RCSTA SPEN RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00x
1Ah
RCREG USART Receive Register
0000 0000 0000 0000
8Ch
PIE1 PSPIE⁽¹⁾ ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h
TXSTA CSRC TX9 TXEN SYNC — BRGH TRMT TX9D 0000 -010 0000 -010
99h
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1: Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
DS39582B-page 118
 2003 Microchip Technology Inc.