RFPIC12F675K Datasheet, PDF (109/136 Pages) Microchip Technology – 20-Pin FLASH-Based 8-Bit CMOS Microcontroller with UHF ASK/FSK Transmitter

rfPIC12F675
FIGURE 13-10: rfPIC12F675 A/D CONVERSION TIMING (NORMAL MODE)
BSF ADCON0, GO
134
Q4
A/D CLK
(TOSC/2)⁽¹⁾
131
130
1 TCY
A/D DATA
9
8
7
6
3
2
1
0
ADRES
OLD_DATA
NEW_DATA
ADIF
1 TCY
GO
SAMPLE
132
SAMPLING STOPPED
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
TABLE 13-9: rfPIC12F675 A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
130
TAD A/D Clock Period
130
TAD A/D Internal RC
Oscillator Period
131
TCNV Conversion Time
(not including
Acquisition Time)⁽¹⁾
132
TACQ Acquisition Time
Min
1.6
3.0*
3.0*
2.0*
—
(Note 2)
Typ†
—
—
6.0
4.0
11
11.5
Max Units
Conditions
—
µs TOSC based, VREF ≥ 3.0V
—
µs TOSC based, VREF full range
ADCS<1:0> = 11 (RC mode)
9.0*
µs At VDD = 2.5V
6.0*
µs At VDD = 5.0V
—
TAD Set GO bit to new data in A/D result
register
—
µs
5*
—
—
µs The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on CHOLD).
134
TGO Q4 to A/D Clock
Start
—
TOSC/2
—
— If the A/D clock source is selected as
RC, a time of TCY is added before
the A/D clock starts. This allows the
SLEEP instruction to be executed.
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 7.1 for minimum conditions.
 2003 Microchip Technology Inc.
Preliminary
DS70091A-page 107