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TH8062 Datasheet, PDF (25/38 Pages) Melexis Microelectronic Systems – Voltage Regulator with LIN Transceiver
TH8062
Voltage Regulator with LIN Transceiver
80
maximum current
70
60
MLPD
50
SOIC8
TA=85°C
TA=125°C
40
SOIC8
30
TA=125°C
20
10
0
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
VSUP [V]
Figure 17 - Save operating area
The linear regulator of the TH8062 operates with input voltages up to 18V and can output a current of 70mA.
The maximum power dissipation limits the maximum output current at high input voltages and high ambient
temperatures. The output current of 70mA at an ambient temperature of TA = 125°C is only possible with
small voltage differences between VSUP and VCC. See Figure 17 for safe operating areas for different ambient
temperatures.
4.2 Low Dropout Regulator
The voltage regulator of theTH8062 is a low dropout regulator (LDO) with a p-MOSFET as driving transistor.
This kind of regulator has a standard pole, generated from the internal frequency compensation and an
additional pole, which is dependent from the load and the load capacitance. This additional pole can cause
an instable behaviour of the regulator! It is required a zero point to compensate this additional pole. It can be
realised via an additional load resistor in series with a load capacitor. It is used for this compensation the
equivalent series resistance (ESR) of the load capacitor. Every real capacitor is characterized with an ESR
value. With the help of this ESR value an additional zero point is implemented into the amplification loop and
therefore the result of the negative phase shift is compensated.
Because of this correlation the regulator has a stable operating area which is defined by the load resistance
RL, the load capacitor CL and the corresponding ESR value. The load resistance resp. load current is defined
by the application itself and therefore the compensation of the pole can only be done via variation of the load
capacitance and ESR value.
Input Capacitor on VSUP CIN
An input capacitance of CIN ≥ 4.7µF is necessary. Higher capacitance values improve the line transient
response and the supply noise rejection behaviour. The combination of electrolytic capacitor (e.g.100µF) in
parallel with a ceramic RF-capacitor (e.g.100nF) archives good disturbance suppressing.
The input capacitor should be placed as close as possible (< 1cm) to the VSUP pin.
TH8062 – Datasheet
3901008062
Page 25 of 38
March 2006
Rev 002