TH8062 Datasheet, PDF (11/38 Pages) Melexis Microelectronic Systems – Voltage Regulator with LIN Transceiver

2.5 Timing Diagrams
TH8062
Voltage Regulator with LIN Transceiver
50%
TxD
V_BUS
t_{df_TXD}
95%
100%
BUS
50%
RxD
0%
50%
t_{df_RXD}
t_{dr_TXD}
50%
5%
t_{dr_RXD}
Figure 2 - Timing diagram for propagation delays
t_Bit
t_Bit
TxD
V_SUP
100%
t_{x_dom_max}
t_{x_dom_min}
t_{x_rec_min}
t_{x_rec_max}
t_dom(max)
t_rec(min)
BUS
58.1%
(61.6%)
28.4%
(25.1%)
t_dom(min)
74.4%
(77.8%)
42.2%
(38.9%)
t_rec(max)
V_SS
0%
Remark:
The levels for low slope mode are shown in brackets
58.1%
(61.6%)
28.4%
(25.1%)
Figure 3 - Timing diagram for duty cycle acc. to LIN 2.0 and J2602
TH8062 – Datasheet
3901008062
Page 11 of 38
March 2006
Rev 002