97SD3240 Datasheet, PDF (35/39 Pages) Maxwell Technologies – 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks

1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM
Writing
97SD3240
Refresh
Auto-Refresh: All the banks must be precharged before executing an auto-refresh command. Since the
auto-refresh command updates the internal counter every time it is executed and determines the banks and
the ROW addresses to be refreshed, external address specification is not required. The refresh cycle is
8192 cycles/6.4 ms. (8192 cycles are requires to refresh all the ROW addresses.) The output buffer
becomes High-Z after auto-refresh start. In addition, since a precharge has been completed by an internal
operation after the auto-refresh, an additional precharge operation by the precharge command is not
required.
Self-refresh¹: After executing a self-refresh command, the self-refresh operation continues while CKE is
held Low. During self-refresh operation, all ROW addresses are refreshed by the internal refresh timer. A
self-refresh is terminated by a self-refresh exit command. Before and after self-refresh mode, execute auto-
refresh to all refresh addresses in or within 6.4ms period on the condition (1) and (2) below.
(1) Enter self-refresh mode within 7.8 us after either burst refresh or distributed refresh at equal interval until
all refresh addresses are completed.
(2) Start burst refresh or distributed refresh at equal interval to all refresh addreses within 7.8 us after exiting
from self-refresh mode.
Others
Power-down mode: The SDRAM enters power-down mode when CKE goes Low in the IDLE state. In
power-down mode, power consumption is suppressed by deactivating the input initial circuit. Power-down
mode continues while CKE is held Low. In addition, by setting CKE to High, the SDRAM exits from the
1. Self refresh mode should only be used at temperatures below 70°C.
02.04.05 Rev 3
All data sheets are subject to change without notice 35
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