97SD3240 Datasheet, PDF(2/39 Page) Maxwell Technologies – 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks

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97SD3240 Datasheet, PDF (2/39 Pages) Maxwell Technologies – 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks

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1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM

97SD3240

Pinout Description

The 97SD3240 Consists of 5, 8-Meg X 8-Bit X 4-Banks, die.

The 132 Pin 3-layer stack package contains 2die in layer one

and two and one die in layer three. CLK1 clocks die 1, 3 and 5,

while CLK2 clocks die 2 and 4.

CKE 1-5, CS 1-5 and DQM 1-5 correspond to one of the die:

CKE1, CS1 and DQM1 control D0 - D7

CKE2, CS2 and DQM2 control D8 - D15

CKE3, CS3 and DQM3 control D16 - D23

CKE4, CS4 and DQM4 control D24 - D31

CKE5, CS5 and DQM5 control D32 - D39

02.04.05 Rev 3

All data sheets are subject to change without notice 2

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