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| MAX11800_1010 Datasheet, PDF (9/59 Pages) Maxim Integrated Products – Low-Power, Ultra-Small Resistive Touch-Screen Controllers with I2C/SPI Interface | |||
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Low-Power, Ultra-Small Resistive Touch-Screen
Controllers with I2C/SPI Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 1.7V to 3.6V, TA = -40°C to +85°C (MAX11800EâMAX11803E), TA = -40°C to +105°C (MAX11800G/MAX11801G), unless oth-
erwise noted. Typical values are at TA = +25°C and VDD = 3.3V, unless otherwise noted.)
PARAMETER
SYMBOL
DIGITAL INPUTS (SDA, DIN, SCL, CLK, A0, CS, A1)
CONDITIONS
MIN TYP MAX UNITS
Input Logic-High Voltage
VIH
0.7 x
VDD
V
Input Logic-Low Voltage
VIL
0.3 x
VDD
V
Input Leakage Current
IIN
VIN = 0V or VDD
-1
+1
μA
Input Hysteresis
VHYS
0.5 x
VDD
V
Input Capacitance
DIGITAL OUTPUTS (SDA, DOUT, TIRQ)
6
pF
Output Logic-High
Output Logic-LowâTIRQ, DOUT
Output Logic-LowâSDA
TIRQ Pullup Resistor
VOH
VOL
VOL
DOUT, ISOURCE = 1mA
TIRQ, CMOS configuration,
ISOURCE = 1mA
ISINK = 1mA
ISINK = 3mA
0.9 x
VDD
V
0.9 x
VDD
0.4
V
0.4
V
125
k
I2C TIMING CHARACTERISTICS
(VDD = 1.7V to 3.6V, TA = -40°C to +85°C (MAX11801E and MAX11803E), TA = -40°C to +105°C (MAX11801G), unless otherwise
noted. Typical values are at TA = +25°C and VDD = 3.3V, unless otherwise noted. See Figure 1.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Serial-Clock Frequency
Bus Free Time
fSCL
0
tBUF
Bus free time between STOP and START
condition
1.3
400
kHz
μs
After this period, the first clock pulse is
Hold Time for START Condition
tHD;STA generated
0.6
μs
SCL Pulse-Width Low
SCL Pulse-Width High
Setup Time for Repeated START
(Sr) Condition
tLOW
tHIGH
tSU;STA
1.3
μs
0.6
μs
0.6
μs
Data Hold Time
Data Setup Time
SDA and SCL Rise/Fall Time
tHD;DAT
tSU;DAT
tR, tF
Receiving
0
100
20 +
CB/10
900
ns
ns
300
ns
SDA and SCL Fall Time
Setup Time for STOP Condition
Bus Capacitance Allowed
Pulse Width of Suppressed Spike
tTF
tSU;STO
CB
tSP
Transmitting
VDD = 1.7V to 2.7V
VDD = 2.7V to 3.6V
20 +
CB/10
0.6
10
10
250
ns
μs
100
pF
400
50
ns
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