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MAX1385 Datasheet, PDF (8/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface
Dual RF LDMOS Bias Controllers
with I2C/SPI Interface
I2C HIGH-SPEED-MODE TIMING CHARACTERISTICS (Note 12, see Figure 2)
(GATEVDD = +5.5V for MAX1385, GATEVDD = +11V for MAX1386, AVDD = +5V, DVDD = 2.7V to 5.25V, external VREFADC = +2.5V,
external VREFDAC = +2.5V, CREF = 0.1µF, TA = -40°C to +85°C, unless otherwise noted).
PARAMETER
Serial-Clock Frequency
Setup Time Repeated START
Condition
SYMBOL
fSCL
tSU;STA
CONDITIONS
MIN
TYP MAX UNITS
0
3.4
MHz
160
ns
Hold Time Repeated START
Condition
SCL Pulse-Width Low
SCL Pulse-Width High
Data Setup Time
Data Hold Time
Rise Time of SCL Signal,
Receiving
tHD;STA
tLOW
tHIGH
tSU;DAT
tHD;DAT
tRCL
(Note 17)
160
ns
160
ns
60
ns
10
ns
0
70
ns
10
40
ns
Rise Time of SCL Signal After a
Repeated START Condition and
After an Acknowledge Bit,
Receiving
tRCL1
10
80
ns
Fall Time of SCL Signal,
Receiving
Rise Time of SDA Signal,
Receiving
Fall Time of SDA Signal,
Transmitting
Setup Time for STOP Condition
Capacitive Load for Each Bus
Line
Pulse Width of Spikes That are
Suppressed by the Input Filter
tFCL
tRDA
tFDA
tSU;STO
Cb
(Note 18)
tSP
10
40
ns
10
80
ns
10
80
ns
160
ns
100
pF
0
10
ns
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