MAX1385 Datasheet, PDF(27/52 Page) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

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MAX1385 Datasheet, PDF (27/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

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Dual RF LDMOS Bias Controllers

with I2C/SPI Interface

Table 2. Register Listing (See Appendix: Recommended Power-Up Code Sequence section)

Analog-to-Digital Conversion

Channel 1 High-Current Threshold

Channel 1 High-Temperature Threshold

Channel 1 Low-Current Threshold

Channel 1 Low-Temperature Threshold

Channel 2 High-Current Threshold

Channel 2 High-Temperature Threshold

Channel 2 Low-Current Threshold

Channel 2 Low-Temperature Threshold

Coarse DAC1 High Wiper Input

Coarse DAC1 Low Wiper Input

Coarse DAC1 Write-Through High Wiper Input

Coarse DAC1 Write-Through Low Wiper Input

Coarse DAC2 High Wiper Input

Coarse DAC2 Low Wiper Input

Coarse DAC2 Write-Through High Wiper Input

Coarse DAC2 Write-Through Low Wiper Input

Device Configuration

FIFO Memory

Fine DAC1 Input Read

Fine DAC1 Input Register with Autocalibration

Fine DAC1 Input Without Autocalibration

Fine DAC1 Write-Through Input with Autocalibration

Fine DAC1 Write-Through Input Without Autocalibration

Fine DAC2 Input Read

Fine DAC2 Input Register with Autocalibration

Fine DAC2 Input Without Autocalibration

Fine DAC2 Write-Through Input with Autocalibration

Fine DAC2 Write-Through Input Without Autocalibration

Flag

Hardware Alarm Configuration

PGA Calibration Control

Software Clear

Software LDAC

Software Shutdown

Software Alarm Configuration

MNEMONIC

ADCCON

IH1

TH1

IL1

TL1

IH2

TH2

IL2

TL2

HIWIPE1

LOWIPE1

THRUHI1

THRULO1

HIWIPE2

LOWIPE2

THRUHI2

THRULO2

DCFIG

FIFO

RDFINE1

FINECAL1

FINE1

FINECALTHRU1

FINETHRU1

RDFINE2

FINECAL2

FINE2

FINECALTHRU2

FINETHRU2

RDFLAG

ALMHCFG

PGACAL

SCLR

LDAC

SSHUT

ALMSCFG

HEX COMMAND

WRITE

READ

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