MAX1385 Datasheet, PDF(33/52 Page) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

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MAX1385 Datasheet, PDF (33/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

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Dual RF LDMOS Bias Controllers

with I2C/SPI Interface

Table 10. LOWIPE1 and LOWIPE2 (Read/Write)

BIT NAME

LCAL

DATA BIT

D15

D14âD8

D7âD0

POR

0000 0000

FUNCTION

1 = Low wiper autocalibration.

0 = No low wiper autocalibration.

Donât care.

8-bit coarse low wiper DAC input code. D7 is the MSB.

ALMHCFG (Read/Write)

The Hardware Alarm Configuration register controls

SAFE1, SAFE2, and ALARM outputs. Write to the

Hardware Alarm Configuration register by sending the

appropriate write command byte followed by data bits

D15âD0 (see Table 15). Bits D15âD8 are donât care.

Read the Hardware Alarm Configuration register by

sending the appropriate read command byte.

Set SETSAFE1 to 1 to immediately force SAFE1 active.

This is especially useful when SAFE1 is connected to

OPSAFE1, giving the user software control over shut-

ting down the LDMOS transistor. Set SETSAFE1 to 0 for

normal operation. SETSAFE2 has the same functionality

as SETSAFE1 but for channel 2.

Set ALARMPOL to 1 to configure ALARM active-low. Set

it to 0 to configure ALARM active-high. Set ALARMOPN

to 1 to configure ALARM open-drain. Set it to 0 to config-

ure ALARM push-pull. Set SAFE1POL to 1 to configure

SAFE1 for active-low, and to 0 for active-high. Set

SAFE2POL to 1 to configure SAFE2 for active-low, and to

0 for active-high. Set SAFE1OPN to 1 to configure SAFE1

for open-drain, and to 0 for push-pull. Set SAFE2OPN

to 1 to configure SAFE2 for open-drain, and to 0 for

push-pull.

When connecting SAFE1 and SAFE2 outputs to

OPSAFE1 and OPSAFE2 inputs, configure the device

as follows:

1) Set SAFE1POL and SAFE2POL to 0s.

Table 11. FINECAL1 and FINECAL2 (Write)

DATA BIT

D15âD10

D9âD0

POR

00 0000 0000

FUNCTION

Donât care.

10-bit fine DAC input code.

D9 is the MSB.

2) Set SAFE1OPN and SAFE2OPN to 0s.

This ensures that when SAFE1 and SAFE2 are assert-

ed, and connected to OPSAFE1 and OPSAFE2, the

LDMOS transistors are shut off.

ADCCON (Write)

The Analog-to-Digital Conversion register selects which

inputs to the ADC are converted. Write to the Analog-to-

Digital Conversion register by sending the appropriate

write command byte followed by data bits D15âD0 (see

Table 16). Bits D15âD12 are donât care. Bits D11âD8

are reserved bits and need to be set to 0. Read the

results of the conversions in the FIFO by sending the

appropriate read command byte. See the ADC

Description section for a complete description of the

ADC.

Set CONCONV to 1 to convert selected inputs to the

ADC continuously and to 0 to convert selected inputs to

the ADC only once. Set ADCSEL2 to 1 to select volt-

ages at ADCIN2 to be converted. Set IEXT2 to 1 to

select voltages at PGAOUT2 to be converted. Set

Table 12. PGACAL (Write)

BIT NAME

RESERVED

DATA BIT

D15âD8

D7âD3

RESET STATE

Reserved. Set to 0.

Donât care.

FUNCTION

FIRSTB

1 = Tracking calibration mode.

0 = Acquisition calibration mode.

DOCAL

1 = Initiate the calibration defined by FIRSTB (one time).

0 = Do not initiate a calibration.

SELFTIME

1 = Initiate periodic calibrations defined by FIRSTB (every 15ms).

0 = Stop periodic calibrations.

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