MAX1385 Datasheet, PDF (7/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

Dual RF LDMOS Bias Controllers
with I²C/SPI Interface
I²C SLOW-/FAST-MODE TIMING CHARACTERISTICS (Note 12, see Figure 1)
(GATEV_DD = +5.5V for MAX1385, GATEV_DD = +11V for MAX1386, AV_DD = +5V, DV_DD = 2.7V to 5.25V, external V_REFADC = +2.5V,
external V_REFDAC = +2.5V, C_REF = 0.1µF, T_A = -40°C to +85°C, unless otherwise noted).
PARAMETER
Serial-Clock Frequency
Bus Free Time Between STOP
and START Condition
SYMBOL
f_SCL
t_BUF
CONDITIONS
MIN TYP MAX UNITS
0
400
kHz
1.3
µs
Hold Time Repeated START
Condition
t_HD;STA
After this period, the first clock pulse is
generated
0.6
SCL Pulse-Width Low
t_LOW
1.3
SCL Pulse-Width High
t_HIGH
0.6
Setup Time Repeated START
Condition
t_SU;STA
0.6
Data Hold Time
t_HD;DAT (Note 13)
0
Data Setup Time
t_SU;DAT
100
Rise Time of Both SDA and SCL
Signals, Receiving
t_R
(Note 14)
0
µs
µs
µs
µs
0.9
µs
ns
300
ns
Fall Time of Both SDA and SCL
Signals, Receiving
t_F
(Note 14)
0
300
ns
Fall Time of SDA Signal,
Transmitting
Setup Time for STOP Condition
Capacitive Load for Each Bus
Line
t_F
(Notes 14, 15)
t_SU;STO
C_b
20 +
0.1C_b
0.6
250
ns
µs
400
pF
Pulse Width of Spikes
Suppressed by the Input Filter
t_SP
(Note 16)
0
50
ns
_______________________________________________________________________________________ 7