MAX1385 Datasheet, PDF (19/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

Dual RF LDMOS Bias Controllers
with I²C/SPI Interface
Clock Mode 00
In clock mode 00, power-up, acquisition, conversion,
and power-down are all initiated by writing to the Analog-
to-Digital Conversion register and performed automati-
cally using the internal oscillator. This is the default clock
mode. The ADC sets the BUSY output high, powers up,
scans all requested channels, stores the results in the
FIFO, and then powers down. After the scan is complete,
BUSY is pulled low and the results for all the command-
ed channels are available in the FIFO.
Clock Mode 01
In clock mode 01, power-up, acquisition, conversion,
and power-down are all initiated by setting CNVST low
for at least 40ns. Conversions are performed automati-
cally using the internal oscillator. The ADC sets the
BUSY output high, powers up, scans all requested
channels, stores the results in the FIFO, and then pow-
ers down. After the scan is complete, BUSY is pulled
low and the results for all the commanded channels are
available in the FIFO.
Clock Mode 11
In clock mode 11, conversions are initiated one at a
time through CNVST in the order shown in Table 1 and
performed using the internal oscillator. In this mode, the
acquisition time is controlled by the time CNVST is
brought low. CNVST is resynchronized by the internal
oscillator, which means there is a one-clock-cycle
uncertainty (typically 320ns) in the exact sampling
instant. Different timing parameters apply depending
whether the conversion is temperature, voltage, using
the external reference, or using the internal reference.
Table 1. Order of ADC Conversion Scan
ORDER OF SCAN
1
2
3
4
5
6
7
DESCRIPTION OF CONVERSION
Internal device temperature
External diode 1 temperature
PGAOUT1 for current sense
ADCIN1
External diode 2 temperature
PGAOUT2 for current sense
ADCIN2
For a temperature conversion, set CNVST low for at
least 40ns. The BUSY output goes high and the temper-
ature conversion results are available after an addition-
al 94µs (when BUSY goes low again). Thus, the
worst-case conversion time of the initial temperature
sensor scan (allowing the internal reference to settle) is
175µs. Subsequent temperature scans only take 85µs
worst case as the internal reference and temperature
sensor circuits are already powered.
For a voltage conversion while using an internal or
external reference, set CNVST low for at least 2µs but
less than 6.7µs. The BUSY output goes high and the
conversion results are available after an additional
7.5µs (typ) when BUSY goes low again.
Continuous conversion is not supported in this clock
mode (see the ADCCON (Write) section).
Changing Clock Modes During ADC Conversions
If a change is made to the clock mode in the Device
Configuration register while the ADC is already per-
forming a conversion (or series of conversions), the fol-
lowing descriptions show how the MAX1385/MAX1386
respond:
• CKSEL = 00 and is then changed to another value
The ADC completes the already triggered series of
conversions and then goes idle. The BUSY output
remains high until the conversions are completed.
The MAX1385/MAX1386 then respond in accor-
dance with the new CKSEL mode.
• CKSEL = 01 and is then changed to another value
If waiting for the initial external trigger, the
MAX1385/MAX1386 immediately exit clock mode
01, power down the ADC, and go idle. The BUSY
output stays low and waits for the external trigger. If
a conversion sequence has started, the ADC com-
pletes the requested conversions and then goes
idle. The BUSY output remains high until the conver-
sions are completed. The MAX1385/MAX1386 then
respond in accordance with the new CKSEL mode.
• CKSEL = 11 and is then changed to another value
If waiting for an external trigger, the MAX1385/
MAX1386 immediately exit clock mode 11, power
down the ADC, and go idle. The BUSY output stays
low and waits for the external trigger.
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