MAX1385 Datasheet, PDF (32/52 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controllers with I2C/SPI Interface

Dual RF LDMOS Bias Controllers
with I²C/SPI Interface
Table 8. ALMSCFG (Read/Write)
BIT NAME
X
ALMSCLR
ALARMCMP
ALARMHYST1
ALARMHYST0
TALARM2
TWIN2
IALARM2
IWIN2
TALARM1
TWIN1
IALARM1
IWIN1
X = Don’t care.
DATA BIT
D15–D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
POR
X
0
0
0
0
0
0
0
0
0
0
0
0
Don’t care
FUNCTION
1 = Temp/current thresholds set to POR state
0 = Temp/current thresholds unaffected
1 = ALARM in output-comparator mode
0 = ALARM in output-interrupt mode
Thresholds hysteresis (ALARMHYST1 is MSB)
00 = 8 LSBs of hysteresis
01 = 16 LSBs of hysteresis
10 = 32 LSBs of hysteresis
11 = 64 LSBs of hysteresis
1 = SAFE2 and ALARM dependent on channel 2 temperature
0 = SAFE2 and ALARM not dependent on channel 2 temperature
1 = Channel 2 temperature thresholds are in window-threshold mode
0 = Channel 2 temperature thresholds are in hysteresis-threshold mode
1 = SAFE2 and ALARM dependent on channel 2 current
0 = SAFE2 and ALARM not dependent on channel 2 current
1 = Channel 2 current thresholds are in window-threshold mode
0 = Channel 2 current thresholds are in hysteresis-threshold mode
1 = SAFE1 and ALARM dependent on channel 1 temperature
0 = SAFE1 and ALARM not dependent on channel 1 temperature
1 = Channel 1 temperature thresholds are in threshold-window mode
0 = Channel 1 temperature thresholds are in hysteresis-threshold mode
1 = SAFE1 and ALARM dependent on channel 1 current
0 = SAFE1 and ALARM not dependent on channel 1 current
1 = Channel 1 current thresholds are in window-threshold mode
0 = Channel 1 current thresholds are in hysteresis-threshold mode
Table 9. HIWIPE1 and HIWIPE2 (Read/Write)
BIT NAME
HCAL
—
—
DATA BIT
D15
D14–D8
D7–D0
POR
1
X
0000 0000
FUNCTION
1 = High wiper autocalibration.
0 = No high wiper autocalibration.
Don’t care.
8-bit coarse high wiper DAC input code. D7 is the MSB.
Table 14). Bits D15–D10 are don’t care. A write to these
registers does not trigger the autocalibration but imme-
diately updates the output of the DAC by transferring
the DAC input register to the DAC output register (writ-
ing through the input register). POR contents for these
registers are all zeros. Read the DAC input register val-
ues written to Fine DAC1 and DAC2 Input registers
through the Fine DAC1/DAC2 Input Read register.
These read registers contain the latest user write to any
Fine DAC1 or Fine DAC2 Input Read register and do
not contain autocalibration corrected values.
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