MAX16031 Datasheet, PDF (6/42 Pages) Maxim Integrated Products – EEPROM-Based System Monitors with Nonvolatile Fault Memory

EEPROM-Based System Monitors
with Nonvolatile Fault Memory
ELECTRICAL CHARACTERISTICS (continued)
(V_CC = 2.9V to 14V, T_A = -40°C to +85°C, unless otherwise specified. Typical values are at V_CC = 3.3V, T_A = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
SMBus TIMING (see Figure 1)
Serial-Clock Frequency
f_SCL
Bus Free Time Between STOP
and START Conditions
t_BUF
1.3
START Condition Setup Time
t_SU:STA
0.6
START Condition Hold Time
t_HD:STA
0.6
STOP Condition Setup Time
t_SU:STO
0.6
Clock Low Period
t_LOW
1.3
Clock High Period
t_HIGH
0.6
Data Setup Time
t_SU:DAT
100
Output Fall Time
t_OF
C_BUS = 10pF to 400pF
Data Hold Time
t_HD:DAT From 50% SCL falling to SDA change
0.3
Minimum Pulse Width Ignored
SMBus Timeout
t_TIMEOUT SCL time low for reset
25
JTAG INTERFACE (see Figure 2)
TDI, TMS, TCK Logic-Low Input
Voltage
V_IL
Input voltage falling
TDI, TMS, TCK Logic-High Input
Voltage
V_IH
Input voltage rising
2.2
TDO Logic-Output Low Voltage
V_OL
I_SINK = 4mA
TDO Logic-Output High Voltage
V_OH
I_SOURCE = 1mA
2.2
TDO Leakage Current
TDO high impedance
-10
TDI, TMS Pullup Resistors
R_JPU Pullup to V_DBP
6.5
I/O Capacitance
C_I/O
TCK Clock Period
t₁
TCK High/Low Time
t_2, t₃ (Note 3)
60
TCK to TMS, TDI Setup Time
t₄
15
TCK to TMS, TDI Hold Time
t₅
35
TCK to TDO Delay
t₆
TCK to TDO High-Impedance
Delay
t₇
MISCELLANEOUS
Power-On Delay
Single-Byte EEPROM Write Cycle
Delay
t_D-PO
(Note 4)
Note 1: Limits to -40°C are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: TCK stops either high or low.
Note 4: An additional cycle is required when writing to configuration memory for the first time.
TYP MAX UNITS
400
kHz
µs
µs
µs
µs
µs
µs
ns
250
ns
0.9
µs
30
ns
35
ms
0.4
V
V
0.4
V
V
+10
µA
10
16
kΩ
50
pF
1000
ns
500
ns
ns
ns
500
ns
500
ns
4
ms
11
ms
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