MAX16031 Datasheet, PDF (37/42 Pages) Maxim Integrated Products – EEPROM-Based System Monitors with Nonvolatile Fault Memory

1 ^{TEST-LOGIC-RESET}
0
1
0
RUN-TEST/IDLE
EEPROM-Based System Monitors
with Nonvolatile Fault Memory
1
SELECT-DR-SCAN
0
1
CAPTURE-DR
0
SHIFT-DR
0
1
EXIT1-DR
1
0
PAUSE-DR
0
1
0
EXIT2-DR
1
UPDATE-DR
1
0
1
SELECT-IR-SCAN
0
1
CAPTURE-IR
0
SHIFT-IR
0
1
1
EXIT1-IR
0
PAUSE-IR
0
1
0
EXIT2-IR
1
UPDATE-IR
1
0
Figure 7. TAP Controller State Diagram
Exit2-DR: A rising edge on TCK with TMS high while in
this state puts the controller in the update-DR state. A
rising edge on TCK with TMS low enters the Shift-DR
state.
Update-DR: A falling edge on TCK while in the update-
DR state latches the data from the shift register path of
the test data registers into a set of output latches. This
prevents changes at the parallel output because of
changes in the shift register. On the rising edge of TCK,
the controller goes to the run-test/idle state if TMS is
low or it goes to the select-DR-scan state if TMS is high.
Select-IR-Scan: All test data registers retain their previ-
ous state. The instruction register remains unchanged
during this state. With TMS low, a rising edge on TCK
moves the controller into the capture-IR state. TMS high
during a rising edge on TCK puts the controller back
into the test-logic-reset state.
Capture-IR: Use the capture-IR state to load the shift
register in the instruction register with a fixed value.
This value is loaded on the rising edge of TCK. If TMS
is high on the rising edge of TCK, the controller enters
the exit1-IR state. If TMS is low on the rising edge of
TCK, the controller enters the shift-IR state.
Shift-IR: In this state, the shift register in the instruction
register is connected between TDI and TDO and shifts
data one stage for every rising edge of TCK toward the
TDO serial output while TMS is low. The parallel outputs
of the instruction register as well as all test data regis-
ters remain at their previous states. A rising edge on
TCK with TMS high moves the controller to the exit1-IR
state. A rising edge on TCK with TMS low keeps the
controller in the shift-IR state while moving data one
stage through the instruction shift register.
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