MAX16031 Datasheet, PDF (39/42 Pages) Maxim Integrated Products – EEPROM-Based System Monitors with Nonvolatile Fault Memory

EEPROM-Based System Monitors
with Nonvolatile Fault Memory
Table 17. 32-Bit Identification Code
MSB
Version (4 bits)
0000
Device ID (16 bits)
0000000000000001
Manufacturer ID (11 bits)
00011001011
LSB
Fixed value (1 bit)
1
Table 18. 32-Bit User-Code Data
MSB
D.C. (don’t cares)
I²C/SMBus
Slave Address
User identification
(firmware version)
00000000000000000 See Table 15 r5Eh[7:0] contents
USERCODE: When the USERCODE instruction is
latched into the parallel instruction register, the user-
code data register is selected. The device user code is
loaded into the user-code data register on the rising
edge of TCK following entry into the capture-DR state.
Shift-DR is used to shift the user code out serially
through TDO. See Table 18.
LOAD ADDRESS: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16031/MAX16032. When the LOAD
ADDRESS instruction is latched into the instruction reg-
ister, TDI connects to TDO through the 8-bit memory
address test data register during the shift-DR state.
READ: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16031/MAX16032. When the READ instruc-
tion is latched into the instruction register, TDI connects
to TDO through the 8-bit memory read test data register
during the shift-DR state.
WRITE: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16031/MAX16032. When the WRITE instruc-
tion is latched into the instruction register, TDI connects
to TDO through the 8-bit memory write test data regis-
ter during the shift-DR state.
REBOOT: This is an extension to the standard IEEE
1149.1 instruction set to initiate a software-controlled
reset to the MAX16031/MAX16032. When the REBOOT
instruction is latched into the instruction register, the
MAX16031/MAX16032 reset and immediately begin
their boot-up sequence.
SAVE: This is an extension to the standard IEEE 1149.1
instruction set that triggers a fault log. When the SAVE
instruction is latched into the instruction register, the
MAX16031/MAX16032 copy fault information from reg-
isters to EEPROM.
Boundary Scan
The boundary scan feature allows access to all the dig-
ital I/O connections of the MAX16031/MAX16032. If the
sample/preload or the EXTEST instruction is loaded into
the instruction register, TDI connects to TDO through
the 198-bit boundary scan register. Each digital I/O pin
corresponds to 1 bit (or 2 bits, in the case of the A0
and A1 pins) of the boundary scan register. The rest of
the boundary scan bits are reserved and are loaded
with zeros.
When the sample/preload instruction is executed, the
current state of the digital outputs is latched into the
boundary scan register and is shifted out through TDO.
This instruction may be executed without interrupting
normal operation of the part. When the EXTEST instruc-
tion is executed, the boundary scan register bits super-
sede the normal functionality of the I/O pins: an output
mirrors the state of the corresponding boundary scan
register bit.
Table 19 lists the function of each boundary scan regis-
ter bit. Since the I²C address select pins have three
possible states, 2 boundary scan register bits are
required to represent them. These bits are defined in
Table 20.
Applications Information
Layout and Bypassing
Bypass V_CC, DBP, and ABP each with a 1µF capacitor
to GND. Bypass RBP with a 2.2µF capacitor to GND.
Avoid routing digital return currents through a sensitive
analog area, such as an analog supply input return
path or ABP’s bypass capacitor ground connection.
Use dedicated analog and digital ground planes.
______________________________________________________________________________________ 39