SSC050-01 Datasheet, PDF (52/79 Pages) Maxim Integrated Products – Two-Wire Serial Backplane Controller

Control Registers
Control Register Definition
SSC050-01
Data Sheet
80h-87h: Bit Control Port 0 Registers (BCP00-BCP07)
Register Name:
Address:
Reset Value:
Description
BCP00-BCP07
80h - 87h
0000_001Xb
Bit Control Port 0 Registers
These eight registers provide individual bit control for the Port 0 I/O pins. All register bits are identical
from a control and status perspective with the only difference being the individual I/O pin controlled.
The Data Direction (bit 1) and General Purpose Data (bit 0) bits are effectively the same bits found in
the DDP0 and GPD0 registers, with parallel read and write paths.
7
6
5
4
3
2
1
0
Function Select
Data Direction General Pur-
pose Data
Bit(s) Bit Label
4:2 FS2-0
1 DD
0 GPD
Access Description
R/W Function Select
These three bits, along with the DD and GPD bits, determine the function of each I/
O pin. When configured as an output, these bits determine the rate at which the high
current drive I/O will toggle, providing a simple mechanism for flashing LED's. The
five bits allow the user to select one of seven flash rates as well as drive the LED
both on and off. It is assumed that the LED is connected to VDD through an external
current limiting resistor. Table 4-7 describes the possible combinations which can
be used to drive an LED.
When configured as an input, these bits determine the type of I/O pin edge transition
which will generate an interrupt condition. Transition detectors within the device will
filter the changes observed at the I/O pin and determine if a valid transition has
occurred. If a valid transition occurs, the INT# pin will assert and a binary value
equal to the address of this register will appear in the BCIS register. Table 4-8
describes the available input edge combinations.
NOTE: When configuring an I/O pin from an output to an input with interrupt enabled, it
is suggested that the data direction change and interrupt enabling be accom-
plished with separate register write operations. This guarantees that any I/O
transition which occurs as a result of the data direction change which may rely on
the weak internal pull-up will not generate an unexpected interrupt.
R/W Data Direction
This bit determines the direction of the data flow through the I/O pin. To enable the
respective I/O pin as an input, set the appropriate bit. To enable the respective I/O
pin as an output, reset the appropriate bit. Each I/O pin can be individually config-
ured as a true bidirectional function. Additionally, an open-drain or open-source
function can be developed by resetting or setting the appropriate data bit and using
the data direction bit as the programmed data value. After a reset or power-on, this
bit will be set to a binary one, enabling the I/O pin as an input with weak pull-up.
R/W General Purpose Data
When the I/O pin has been enabled as an output, writing this bit determines the data
value which will be present on the corresponding I/O pin. If the I/O pin has been ena-
bled as an input, reading this register bit will represent the current voltage applied to
the pin. At no time will this bit directly represent the value latched into the data regis-
ter. If the pin is enabled as an input and there is no signal applied, a weak internal
pull-up resistor will hold the pin at a binary one. After a reset or power-on, this regis-
ter bit will be set to a binary one, but the value returned from a register read will be
the level applied to the pin since by default each pin is an input.
Revision 4.0
November 10, 2004
4-36