SSC050-01 Datasheet, PDF (22/79 Pages) Maxim Integrated Products – Two-Wire Serial Backplane Controller

Control Registers
Control Register Definition
SSC050-01
Data Sheet
CONTROL REGISTER DEFINITION
The register definition provides a bit-level description of all register bits including power-on and default
values. The terms "set" and "assert" refer to bits which are programmed to a binary one. The terms
"reset", "de-assert" and "clear" refer to bits which are programmed to a binary zero. Reserved bits are
represented by "RES" and will always return an unknown value and should be masked. Any bits which
are reserved should never be set to a binary one. These bits may be defined in future versions of the
device.
00h: General Purpose I/O Port 0 Data (GPD0)
Register Name:
Address:
Reset Value:
Description
GPD0
00h
XXXX_XXXXb
General Purpose I/O Port 0 Data
7
6
5
4
3
2
1
0
General Purpose Data
Bit(s) Bit Label
7:0
GPD0.7-0
Access Description
R/W When the I/O pin has been enabled as an output, writing these bits determines the
data value which will be present on the corresponding I/O pin. If the I/O pin has been
enabled as an input, reading these register bits will represent the current voltage
applied to the pin. At no time will the bits directly represent the value latched into the
data register. If a pin is enabled as an input and there is no signal applied, weak
internal pull-up resistors will hold the pin at a binary one. After a reset or power-on,
the register bits will be set to a binary one, but the value returned from a register
read will be the level applied to the pin since by default each pin is an input.
Revision 4.0
November 10, 2004
GPD Read Data
FILTER
GPD Write Data
DQ
CK
I/O Port
DD Write Data
DD Read Data
DQ
CK
I/O Port Block Diagram
Figure 4-1. I/O Port Block Diagram
4-6