MAX12553 Datasheet, PDF (5/28 Pages) Maxim Integrated Products – 14-Bit, 65Msps, 3.3V ADC

14-Bit, 65Msps, 3.3V ADC
ELECTRICAL CHARACTERISTICS (continued)
(V_DD = 3.3V, OV_DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), V_IN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f_CLK = 65MHz (50% duty cycle), T_A = -40°C to +85°C, unless otherwise noted. Typical values are at T_A = +25°C.) (Note 1)
PARAMETER
SYMBOL
Input Resistance
R_CLK
Input Capacitance
C_CLK
DIGITAL INPUTS (CLKTYP, G/T, PD)
Figure 5
Input High Threshold
V_IH
CONDITIONS
MIN TYP
5
2
0.8 x
OV_DD
Input Low Threshold
V_IL
Input Leakage Current
Input Capacitance
C_DIN
DIGITAL OUTPUTS (D13–D0, DAV, DOR)
Output Voltage Low
V_OL
Output Voltage High
Tri-State Leakage Current
D13–D0, DOR Tri-State Output
Capacitance
DAV Tri-State Output
Capacitance
POWER REQUIREMENTS
Analog Supply Voltage
V_OH
I_LEAK
C_OUT
C_DAV
V_DD
V_IH = OV_DD
V_IL = 0
D13–D0, DOR, I_SINK = 200µA
DAV, I_SINK = 600µA
D13–D0, DOR, I_SOURCE = 200µA
DAV, I_SOURCE = 600µA
(Note 4)
(Note 4)
(Note 4)
5
OV_DD -
0.2
OV_DD -
0.2
3
6
3.15
3.3
Digital Output Supply Voltage
OV_DD
1.7
2.0
Analog Supply Current
I_VDD
Normal operating mode,
f_IN = 175MHz at -0.5dBFS, CLKTYP = GND,
single-ended clock
Normal operating mode,
f_IN = 175MHz at -0.5dBFS,
CLKTYP = OV_DD, differential clock
Power-down mode clock idle, PD = OV_DD
102
110
0.045
MAX
UNITS
kΩ
pF
V
0.2 x
V
OV_DD
±5
µA
±5
pF
0.2
V
0.2
V
±5
µA
pF
pF
3.60
V
V_DD +
V
0.3V
mA
123
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