MAX12553 Datasheet, PDF (20/28 Pages) Maxim Integrated Products – 14-Bit, 65Msps, 3.3V ADC

14-Bit, 65Msps, 3.3V ADC
0x1FFF
0x1FFE
0x1FFD
1 LSB =
V_REFP - V_REFN
16384
x
4
3
(V_REFP - V_REFN) x 2/3
(V_REFP - V_REFN) x 2/3
0x2000
0x2001
0x2003
1 LSB =
V_REFP - V_REFN
16384
x
4
3
(V_REFP - V_REFN) x 2/3
(V_REFP - V_REFN) x 2/3
0x0001
0x0000
0x3FFF
0x3001
0x3000
0x1000
0x2003
0x2002
0x2001
0x2000
-8191 -8189
-1 0 +1
+8189 +8191
DIFFERENTIAL INPUT VOLTAGE (LSB)
Figure 7. Two’s Complement Transfer Function (G/T = 0)
low, the MAX12553 is in normal operating mode. With
PD high, the MAX12553 is in power-down mode.
The power-down mode allows the MAX12553 to effi-
ciently use power by transitioning to a low-power state
when conversions are not required. Additionally, the
MAX12553 parallel output bus is high impedance in
power-down mode, allowing other devices on the bus
to be accessed.
In power-down mode, all internal circuits are off, the
analog supply current reduces to 0.045mA, and the
digital supply current reduces to 0.02mA. The following
list shows the state of the analog inputs and digital out-
puts in power-down mode:
• INP, INN analog inputs are disconnected from the
internal input amplifier (Figure 3).
• REFOUT has approximately 17kΩ to GND.
• REFP, COM, REFN go high impedance with respect
to V_DD and GND, but there is an internal 4kΩ resistor
between REFP and COM, as well as an internal 4kΩ
resistor between REFN and COM.
• D13–D0, DOR, and DAV go high impedance.
• CLKP, CLKN go high impedance (Figure 5).
The wake-up time from power-down mode is dominat-
ed by the time required to charge the capacitors at
REFP, REFN, and COM. In internal reference mode and
buffered external reference mode, the wake-up time is
0x0002
0x0003
0x0001
0x0000
-8191 -8189
-1 0 +1
+8189 +8191
DIFFERENTIAL INPUT VOLTAGE (LSB)
Figure 8. Gray Code Transfer Function (G/T = 1)
typically 10ms with the recommended capacitor array
(Figure 13). When operating in unbuffered external ref-
erence mode, the wake-up time is dependent on the
external reference drivers.
Applications Information
Using Transformer Coupling
In general, the MAX12553 provides better SFDR and THD
performance with fully differential input signals as
opposed to single-ended input drive. In differential input
mode, even-order harmonics are lower as both inputs are
balanced, and each of the ADC inputs only requires half
the signal swing compared to single-ended input mode.
An RF transformer (Figure 10) provides an excellent
solution to convert a single-ended input source signal
to a fully differential signal, required by the MAX12553
for optimum performance. Connecting the center tap of
the transformer to COM provides a V_DD/2 DC level shift
to the input. Although a 1:1 transformer is shown, a
step-up transformer can be selected to reduce the
drive requirements. A reduced signal swing from the
input driver, such as an op amp, can also improve the
overall distortion. The configuration of Figure 10 is good
for frequencies up to Nyquist (f_CLK/2).
The circuit of Figure 11 converts a single-ended input
signal to fully differential just as Figure 10. However,
Figure 11 utilizes an additional transformer to improve
20 ______________________________________________________________________________________