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MAX1519 Datasheet, PDF (34/43 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controllers for Programmable CPU Core Power Supplies
Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
Input Capacitor Selection
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents.
The multiphase Quick-PWM controllers operate out-of-
phase, while the Quick-PWM slave controllers provide
selectable out-of-phase or in-phase on-time triggering.
Out-of-phase operation reduces the RMS input current
by dividing the input current between several stag-
gered stages. For duty cycles less than 100%/ηOUTPH
per phase, the IRMS requirements may be determined
by the following equation:
IRMS
=



η
ILOAD
OUTPH VIN



ηOUTPH VOUT(VIN − ηOUTPHVOUT)
where ηOUTPH is the total number of out-of-phase switch-
ing regulators. The worst-case RMS current requirement
occurs when operating with VIN = 2ηOUTPHVOUT. At this
point, the above equation simplifies to IRMS = 0.5 ×
ILOAD/ηOUTPH.
For most applications, nontantalum chemistries (ceramic,
aluminum, or OS-CON™) are preferred due to their resis-
tance to inrush surge currents typical of systems with a
mechanical switch or connector in series with the input. If
the Quick-PWM controller is operated as the second
stage of a two-stage power-conversion system, tantalum
input capacitors are acceptable. In either configuration,
choose an input capacitor that exhibits less than 10°C
temperature rise at the RMS input current for optimal cir-
cuit longevity.
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (NH) must be able to dissipate
the resistive losses plus the switching losses at both
VIN(MIN) and VIN(MAX). Calculate both of these sums.
Ideally, the losses at VIN(MIN) should be roughly equal to
losses at VIN(MAX), with lower losses in between. If the
losses at VIN(MIN) are significantly higher than the losses
at VIN(MAX), consider increasing the size of NH (reducing
RDS(ON) but with higher CGATE). Conversely, if the losses
at VIN(MAX) are significantly higher than the losses at
VIN(MIN), consider reducing the size of NH (increasing
RDS(ON) to lower CGATE). If VIN does not vary over a wide
range, the minimum power dissipation occurs where the
resistive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (RDS(ON)), comes in a moderate-
sized package (i.e., one or two SO-8s, DPAK, or
D2PAK), and is reasonably priced. Ensure that the DL
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
gate-to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems can
occur (see the MOSFET Gate Driver section).
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (NH), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
PD
(NH
RESISTIVE)
=


VOUT
VIN





ILOAD
η TOTAL
2


RDS(ON)
where ηTOTAL is the total number of phases.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the RDS(ON) required to stay within package
power dissipation often limits how small the MOSFETs
can be. Again, the optimum occurs when the switching
losses equal the conduction (RDS(ON)) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (NH) due to switching losses is difficult since
it must allow for difficult quantifying factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching-loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on NH:
PD
(NH
SWITCHING)
=
(VIN(MAX))2


CRSSfSW
IGATE





ILOAD
η TOTAL



where CRSS is the reverse transfer capacitance of NH and
IGATE is the peak gate-drive source/sink current (1A, typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
× VIN2 × fSW switching-loss equation. If the high-side
MOSFET chosen for adequate RDS(ON) at low battery
voltages becomes extraordinarily hot when biased from
VIN(MAX), consider choosing another MOSFET with
lower parasitic capacitance.
OS-CON is a trademark of Sanyo.
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