MAX1519 Datasheet, PDF(22/43 Page) Maxim Integrated Products – Dual-Phase, Quick-PWM Controllers for Programmable CPU Core Power Supplies

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MAX1519 Datasheet, PDF (22/43 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controllers for Programmable CPU Core Power Supplies

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Dual-Phase, Quick-PWM Controllers for

Programmable CPU Core Power Supplies

SUS

1 LSB PER RTIME CYCLE

VDAC

OUTPUT SET BY D0âD4

OUTPUT SET BY SUS AND S0âS1

TIME

CLOCK

VROK

tSLEW

tBLANK = 24 CLKS

VROK BLANKING

tSLEW

tBLANK = 24 CLKS

VROK BLANKING

Figure 4. Suspend Transition

than the current limit set by ILIM. The transition time is

given by:

tSLEW

fSLEW

ï£«

ï£ï£¬

VOLD â VNEW

VLSB

ï£¶

ï£¸ï£·

for

VOUT

rising

tSLEW

fSLEW

ï£®ï£«

ï£°ï£¯ï£¯ï£ï£¬

VOLD â VNEW

VLSB

ï£¶

ï£¸ï£·

ï£¹

+ 2ï£º

ï£»ï£º

for VOUT

falling

where fSLEW = 500kHz â 30kâ¦ / RTIME, VOLD is the

original DAC setting, VNEW is the new DAC setting, and

VLSB is the DACâs smallest voltage increment. The

additional two clock cycles on the falling edge time are

due to internal synchronization delays. See TIME

Frequency Accuracy in the Electrical Characteristics for

fSLEW limits.

The practical range of RTIME is 15kâ¦ to 150kâ¦ corre-

sponding to 1.0Âµs to 10Âµs per 25mV step. Although the

DAC takes discrete steps, the output filter makes the

transitions relatively smooth. The average inductor cur-

rent required to make an output voltage transition is:

IL â COUT Ã VLSB Ã fSLEW

Fault Protection

Output Overvoltage Protection

(MAX1545 Only)

The overvoltage protection (OVP) circuit is designed to

protect the CPU against a shorted high-side MOSFET by

drawing high current and blowing the battery fuse. The

MAX1519/MAX1545 continuously monitor the output for

an overvoltage fault. During normal forced-PWM opera-

tion (SKIP = high), the controller detects an OVP fault if

the output voltage exceeds the set DAC voltage by

more than 13% (min). During pulse-skipping operation

(SKIP = REF or GND), the controller detects an OVP

fault if the output voltage exceeds the fixed 2V (typ)

threshold. When the OVP circuit detects an overvoltage

fault, it immediately sets the fault latch, pulls VROK low,

and activates the shutdown sequence.

This action discharges the output filter capacitor and

forces the output to ground. If the condition that caused

the overvoltage (such as a shorted high-side MOSFET)

persists, the battery fuse blows. The controller remains

shut down until the fault latch is cleared by toggling

SHDN or cycling the VCC power supply below 1V.

Overvoltage protection can be disabled through the âno-

faultâ test mode (see the No-Fault Test Mode section).

Output Undervoltage Shutdown

The output UVP function is similar to foldback current

limiting, but employs a timer rather than a variable current

limit. If the MAX1519/MAX1545 output voltage is under

70% of the nominal value, the controller activates the

shutdown sequence and sets the fault latch.

Once the controller ramps down to the 0V DAC code

setting, it forces the DL_ low-side gate-driver high, and

pulls the DH_ high-side gate-driver low. Toggle SHDN

or cycle the VCC power supply below 1V to clear the

fault latch and reactivate the controller. UVP is ignored

during output voltage transitions and remains blanked

22 ______________________________________________________________________________________

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