MAX1519 Datasheet, PDF(27/43 Page) Maxim Integrated Products – Dual-Phase, Quick-PWM Controllers for Programmable CPU Core Power Supplies

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MAX1519 Datasheet, PDF (27/43 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controllers for Programmable CPU Core Power Supplies

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Dual-Phase, Quick-PWM Controllers for

Programmable CPU Core Power Supplies

On-times translate only roughly to switching frequencies.

The on-times guaranteed in the Electrical Characteristics

are influenced by switching delays in the external high-

side MOSFET. Resistive losses, including the inductor,

both MOSFETs, output capacitor ESR, and PC board

copper losses in the output and ground tend to raise the

switching frequency at higher output currents. Also, the

dead-time effect increases the effective on-time, reduc-

ing the switching frequency. It occurs only during forced-

PWM operation and dynamic output voltage transitions

when the inductor current reverses at light or negative

load currents. With reversed inductor current, the induc-

torâs EMF causes LX to go high earlier than normal,

extending the on-time by a period equal to the DH-rising

dead time.

For loads above the critical conduction point, where the

dead-time effect is no longer a factor, the actual switch-

ing frequency (per phase) is:

( ) fSW =

VOUT + VDROP1

( ) tON VIN + VDROP1 - VDROP2

where VDROP1 is the sum of the parasitic voltage drops in

the inductor discharge path, including synchronous recti-

fier, inductor, and PC board resistances; VDROP2 is the

sum of the parasitic voltage drops in the inductor charge

path, including high-side switch, inductor, and PC board

resistances; and tON is the on-time as determined above.

Current Balance

Without active current-balance circuitry, the current

matching between phases depends on the MOSFETâs

on-resistance (RDS(ON)), thermal ballasting, on-/off-time

matching, and inductance matching. For example, vari-

ation in the low-side MOSFET on-resistance (ignoring

thermal effects) results in a current mismatch that is

proportional to the on-resistance difference:

IMAIN

I2ND =

IMAIN

ï£®

ï£¯1 -

ï£°ï£¯

ï£«

ï£ï£¬

RMAIN

R2ND

ï£¶

ï£¸ï£·

ï£¹

ï£º

ï£»ï£º

However, mismatches between on-times, off-times, and

inductor values increase the worst-case current imbal-

ance, making it impossible to passively guarantee

accurate current balancing.

The multiphase Quick-PWM controller integrates the

difference between the current-sense voltages and

adjusts the on-time of the secondary phase to maintain

current balance. The current balance now relies on the

accuracy of the current-sense resistors instead of the

inaccurate, thermally sensitive on-resistance of the low-

side MOSFETs.

With active current balancing, the current mismatch is

determined by the current-sense resistor values and the

offset voltage of the transconductance amplifiers:

IOS(IBAL) =

ILM

ILS

VOS(IBAL)

RSENSE

where VOS(IBAL) is the current-balance offset specifica-

tion in the Electrical Characteristics.

The worst-case current mismatch occurs immediately

after a load transient due to inductor value mismatches

resulting in different di/dt for the two phases. The time it

takes the current-balance loop to correct the transient

imbalance depends on the mismatch between the

inductor values and switching frequency.

Feedback Adjustment Amplifiers

Voltage-Positioning Amplifier

The multiphase Quick-PWM controllers include an inde-

pendent operational amplifier for adding gain to the volt-

age-positioning sense path. The voltage-positioning

gain allows the use of low-value current-sense resistors

in order to minimize power dissipation. This 3MHz gain-

bandwidth amplifier was designed with low offset volt-

age (70ÂµV, typ) to meet the IMVP output accuracy

requirements.

The inverting (OAIN-) and noninverting (OAIN+) inputs

are used to differentially sense the voltage across the

voltage-positioning sense resistor. The op ampâs output is

internally connected to the regulatorâs feedback input

(FB). The op amp should be configured as a noninvert-

ing, differential amplifier, as shown in Figure 10. The

voltage-positioning slope is set by properly selecting the

feedback resistor connected from FB to OAIN- (see the

Setting Voltage Positioning section). For applications

using a slave controller, additional differential input

resistors (summing configuration) can be connected to

the slaveâs voltage-positioning sense resistor. Summing

together both the master and slave current-sense signals

ensures that the voltage-positioning slope remains con-

stant when the slave controller is disabled.

The controller also uses the amplifier for remote output

sensing (FBS) by summing the remote-sense voltage

into the positive terminal of the voltage-positioning

amplifier (Figure 10).

In applications that do not require voltage-positioning

gain, the amplifier can be disabled by connecting the

OAIN- pin directly to VCC. The disabled amplifierâs out-

put becomes high impedance, guaranteeing that the

unused amplifier does not corrupt the FB input signal.

The logic threshold to disable the op amp is approxi-

mately VCC - 1V.

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