DS1558 Datasheet, PDF (2/18 Pages) Dallas Semiconductor – Watchdog Clock with NV RAM Control

DS1558
PIN DESCRIPTION
PIN NAME
FUNCTION
1, 13, 39
41, 43
N.C.
No Connection
2
A18
3
A16
4
A14
5
A12
6
A7
7
A6
8
A5
9
A4
10
A3
Address Inputs for Address Decode. The DS1558 uses the address inputs to determine
11
A2 whether or not a read or write cycle should be directed to the attached SRAM or to the
12
A1
RTC registers.
14
A0
27
A10
29
A11
30
A9
31
A8
32
A13
36
A15
44
A17
15
DQ0
16
DQ1
17
DQ2
19
DQ3
Data Input/Outputs. Data input/output pins for the RTC registers.
20
DQ4
21
DQ5
22
DQ6
23
DQ7
18, 45,
48
24
GND
CER
Ground
Active-Low Chip-Enable RAM. CE is passed through to CER, with an added
propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If OE is also low, the RTC outputs data on DQ0–DQ7.
Active-Low Output-Enable RAM. OE is passed through to OER, with an added
25
OER propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If CE is also low, the RTC outputs data on DQ0–DQ7.
26
CE Active-Low Chip-Enable Input. Used to access the RTC and the external SRAM.
28
OE Active-Low Output-Enable Input. Used to access the RTC and the external SRAM.
Active-Low Interrupt/Frequency-Test Output. This pin is used to output the alarm
33
IRQ/FT interrupt or the frequency test signal. It is open drain and requires an external pullup
resistor.
34
WE Active-Low Write Enable. Used to write data to the RTC registers.
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