DS1558 Datasheet, PDF (13/18 Pages) Dallas Semiconductor – Watchdog Clock with NV RAM Control

DS1558
READ CYCLE, AC CHARACTERISTICS
(V_CC = +3.3V ±10% or +5V ±10%, T_A = -40°C to +85°C.) (Figure 5)
PARAMETER
SYMBOL ^{VCC = +5.5V ±10% VCC = +3.3V ±10%}
MIN MAX MIN MAX
Read Cycle Time
t_RC
70
120
Address Access Time
t_AA
70
120
CE to DQ Low-Z
t_CEL
5
5
CE Access Time
t_CEA
70
120
CE Data Off Time
t_CEZ
25
40
OE to DQ Low-Z
OE Access Time
t_OEL
5
5
t_OEA
35
100
OE Data Off Time
t_OEZ
25
35
Output Hold from Address
t_OH
5
5
CE to CER Propagation
Delay, +5V
t_CEPD
15
OE to OER Propagation
Delay, +5V
t_OEPD
20
CE to CER Propagation
Delay, +3.3V
t_CEPD
30
OE to OER Propagation
Delay, +3.3V
t_OEPD
40
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
Figure 5. READ CYCLE TIMING DIAGRAM
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