DS3100_09 Datasheet, PDF (184/227 Pages) Maxim Integrated Products – Stratum 2/3E/3 Timing Card IC

DS3100
Register Name:
Register Description:
Register Address:
BRAF
BITS Receive Align Frame Register (E1 only)
50h
Name
Default
Bit 7
Si
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
FAS[6:0]
0
Bit 2
0
Bit 1
0
Bit 0
0
The align frame is the E1 frame containing the frame alignment signal (FAS). The bits of this register indicate the
first eight bits received in the most recent align frame. The bits are latched into this register at the start of the align
frame. The start of the align frame is indicated by the RAF status bit in BRSR3. See Section 7.10.6.3.
Bit 7: International Bit (Si).
Bits 6 to 0: Frame Alignment Signal (FAS[6:0]. When a normal E1 signal is being received, FAS[6:0]=0011011.
Register Name:
Register Description:
Register Address:
BRNAF
BITS Receive Non-Align Frame Register (E1 only)
51h
Name
Default
Bit 7
Si
0
Bit 6
1
0
Bit 5
RAI
0
Bit 4
Sa4
0
Bit 3
Sa5
0
Bit 2
Sa6
0
Bit 1
Sa7
0
Bit 0
Sa8
0
The non-align frame is the E1 frame that does not contain the frame alignment signal (FAS). The bits of this
register indicate the first eight bits received in the most recent non-align frame. The bits are latched into this
register at the start of the align frame. The start of the align frame is indicated by the RAF status bit in BRSR3. See
Section 7.10.6.3.
Bit 7: International Bit (Si).
Bit 6: Non-Align Frame Signal Bit. Set to 1 in a normal E1 double frame.
Bit 5: Remote Alarm Indication (RAI). This is the normal status bit for detecting RAI in the incoming E1 signal.
0 = No alarm condition
1 = Alarm condition
Bits 4 to 0: Additional Spare Bits (Sa4 to Sa8).
19-4546; Rev 9; 5/09
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