DS3100_09 Datasheet, PDF (166/227 Pages) Maxim Integrated Products – Stratum 2/3E/3 Timing Card IC

DS3100
Register Name:
Register Description:
Register Address:
BRCR3
BITS Receive Configuration Register 3 (E1 only)
24h
Name
Default
Bit 7
—
0
Bit 6
RHDB3
0
Bit 5
RSIGM
0
Bit 4
—
0
Bit 3
RCRC4
0
Bit 2
FRC
0
Bit 1
SYNCD
0
Bit 0
RESYNC
0
The fields of this register configure the receive framer when it is in E1 mode only (BRMMR:RT1E1=1). In DS1
mode this register is reserved and should not be written. See Section 7.10.6.1.
Bit 6: Receive HDB3 Enable (RHDB3).
0 = HDB3 decoding disabled
1 = HDB3 decoding enabled
Bit 5 : Receive Signaling Mode Select (RSIGM).
0 = CAS signaling mode
1 = CCS signaling mode
Bit 3: Receive CRC-4 Enable (RCRC4).
0 = CRC-4 framing disabled
1 = CRC-4 framing enabled
Bit 2: Frame Resync Criteria (FRC).
0 = Resync if FAS is received in error three consecutive times
1 = Resync if either FAS or bit 2 of non-FAS is received in error three consecutive times
Bit 1: Sync Disable (SYNCD). The bit specifies whether or not the receive framer automatically attempts to
resynchronize to (i.e. search for the start-of-frame in) the incoming signal.
0 = Auto resync enabled
1 = Auto resync disabled
Bit 0: Resynchronize (RESYNC). A zero-to-one transition causes the receive framer to resynchronize to (i.e.
search for the start of frame in) the incoming signal. RESYNC must be cleared and set again for a subsequent
resync.
Register Name:
Register Description:
Register Address:
BRCR4
BITS Receive Configuration Register 4 (E1 only)
25h
Name
Default
Bit 7
—
0
Bit 6
—
0
Bit 5
—
0
Bit 4
—
0
Bit 3
—
0
Bit 2
—
0
Bit 1
—
0
Bit 0
RLOSC
0
The fields of this register configure the receive framer when it is in E1 mode only (BRMMR:RT1E1=1). In DS1
mode this register is reserved and should not be written. See Section 7.10.6.1.
Bit 0: Receive Loss of Signal Criteria (RLOSC).
0 = RLOS declared upon 255 consecutive zeros (125 μs)
1 = RLOS declared upon 2048 consecutive zeros (1 ms)
19-4546; Rev 9; 5/09
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