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MAX11158 Datasheet, PDF (16/26 Pages) Maxim Integrated Products – 500ksps Throughput Rates Without Pipeline
MAX11158
18-Bit, 500ksps, ±5V SAR ADC with
Internal Reference in µMAX
Shutdown
In all interface modes, the MAX11158 can be placed into a
shutdown state by holding SCLK high while pulling CNVST
from high to low. Supply current is reduced to less than
10µA on both VDD and OVDD supplies (see Figure 4). To
wake up from shutdown mode, hold SCLK low and pull
CNVST from high to low.
ADC Modes of Operation
The MAX11158 six modes of operation are summarized in
Table 3. For each of the six modes of operation a typical
application model and list of benefits are described.
CS Mode 3-Wire, No-Busy Indicator
The 3-wire CS mode with no-busy indicator is ideally
suited for isolated applications that require minimal wiring
complexity. In Figure 5, a single ADC is connected to an
SPI-compatible digital host with corresponding timing given
in Figure 6.
With SDI connected to OVDD, a rising edge on CNVST
completes the acquisition, initiates the conversion and
forces SDO to high impedance. The conversion continues
to completion irrespective of the state of CNVST, allowing
CNVST to be used as a select line for other devices on the
board. CNVST must be returned high before the minimum
conversion time and held high until the maximum conver-
sion time to avoid generating the busy signal indicator.
When the conversion is complete, the MAX11158 enters
the acquisition phase. Drive CNVST low to output the
MSB onto SDO. The remaining data bits are then clocked
by subsequent SCLK falling edges. SDO returns to high
impedance after the 18th SCLK falling edge or when
CNVST goes high.
CNVST
tSSCLKCNV
SCLK
tSSCLKCNV
tHSCLKCNV
tHSCLKCNV
INTERNAL SHUTDOWN SIGNAL
POWERED DOWN
POWERED UP
Figure 4. Entering and Exiting Shutdown Mode
Table 3. ADC Modes of Operation
MODE
TYPICAL APPLICATION AND BENEFITS
CS Mode 3-Wire, No-Busy Indicator
Single ADC connected to SPI-compatible digital host. Minimal wiring complexity; ideally
suited for isolated applications.
CS Mode 3-Wire, With Busy Indicator
Single ADC connected to SPI-compatible digital host with interrupt input. Minimal wiring
complexity; ideally suited for isolated applications.
CS Mode 4-Wire, No-Busy Indicator
Multiple ADCs connected to SPI-compatible digital host. CNVST used for acquisition and
conversion; ideally suited for low jitter applications and simultaneous sampling. SDI used
to control data readback.
CS Mode 4-Wire, With Busy Indicator
Single ADC connected to SPI-compatible digital host with interrupt input. CNVST used for
acquisition and conversion; ideally suited for low jitter applications.
Daisy-Chain Mode, No-Busy Indicator
Multiple ADCs connected to 3-wire serial interface. Minimal wiring complexity; ideally
suited for multichannel simultaneous sampled isolated applications.
Daisy-Chain Mode, With Busy Indicator
Multiple ADCs connected to 3-wire serial interface with busy indicator. Minimal wiring
complexity; ideally suited for multichannel simultaneous sampled isolated applications.
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