MAX11634 Datasheet, PDF (14/24 Pages) Maxim Integrated Products – 12-Bit, 300ksps ADCs with Differential

12-Bit, 300ksps ADCs with Differential
Track/Hold, and Internal Reference
Applications Information
Register Descriptions
The MAX11634–MAX11637 communicate between the
internal registers and the external circuitry through the
SPI/QSPI-compatible serial interface. Table 1 details
the registers and the bit names. Tables 2–7 show the
various functions within the conversion register, setup
register, averaging register, reset register, unipolar reg-
ister, and bipolar register.
Conversion Time Calculations
The conversion time for each scan is based on a num-
ber of different factors: conversion time per sample,
samples per result, results per scan, and if the external
reference is in use.
Use the following formula to calculate the total conver-
sion time for an internally timed conversion in clock
modes 00 and 10 (see the Electrical Characteristics
table as applicable):
Total Conversion Time = t_CNV x n_AVG x n_RESULT + t_RP
where:
t_CNV = t_ACQ(MAX) + t_CONV(MAX)
n_AVG = samples per result (amount of averaging)
n_RESULT = number of FIFO results requested; deter-
mined by number of channels being scanned or by
NSCAN1, NSCAN0
t_RP = internal reference wake up; set to zero if internal
reference is already powered up or external reference
is being used
In clock mode 01, the total conversion time depends on
how long CNVST is held low or high, including any time
required to turn on the internal reference. Conversion
time in externally clocked mode (CKSEL1, CKSEL0 = 11)
depends on the SCLK period and how long CS is held
high between each set of eight SCLK cycles. In clock
mode 01, the total conversion time does not include the
time required to turn on the internal reference.
Conversion Register
Select active analog input channels and scan modes
by writing to the conversion register. Table 2 details
channel selection, the four scan modes, and how to
request a temperature measurement. Request a scan
by writing to the conversion register when in clock
mode 10 or 11, or by applying a low pulse to the
CNVST pin when in clock mode 00 or 01.
A conversion is not performed if it is requested on a
channel that has been configured as CNVST or REF-.
Do not request conversions on channels 4–7 on the
MAX11634/MAX11635. Set CHSEL[2:0] to the lower
channel’s binary values. If the last two channels are
configured as a differential pair and one of them has
been reconfigured as CNVST or REF-, the pair is
ignored.
Select scan mode 00 or 01 to return one result per
single-ended channel and one result per differential
pair within the requested range. Select scan mode 10
to scan a single input channel numerous times,
depending on NSCAN1 and NSCAN0 in the averag-
ing register (Table 6). Select scan mode 11 to return
only one result from a single channel.
Table 1. Input Data Byte (MSB First)
REGISTER NAME
Conversion
Setup
Averaging
Reset
Unipolar Mode (Setup)
Bipolar Mode (Setup)
X = Don’t care.
BIT 7
1
0
0
0
UCH0/1
BCH0/1
BIT 6
X
1
0
0
UCH2/3
BCH1/2
BIT 5
CHSEL2
CKSEL1
1
0
UCH4/5
BCH4/5
BIT 4
CHSEL1
CKSEL0
AVGON
1
UCH6/7
BCH6/7
BIT 3
CHSEL0
REFSEL1
NAVG1
RESET
X
X
BIT 2
SCAN1
REFSEL0
NAVG0
X
X
X
BIT 1
SCAN0
DIFFSEL1
NSCAN1
X
X
X
BIT 0
X
DIFFSEL0
NSCAN0
X
X
X
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