MAX1280 Datasheet, PDF (12/24 Pages) Maxim Integrated Products – 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference

400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
Serial 12-Bit ADCs with Internal Reference
Track/Hold
The T/H enters its tracking mode on the falling clock
edge after the fifth bit of the 8-bit control word has been
shifted in. It enters its hold mode on the falling clock
edge after the eighth bit of the control word has been
shifted in. If the converter is set up for single-ended
inputs, IN- is connected to COM and the converter con-
verts the “+” input. If the converter is set up for differen-
tial inputs, the difference of [(IN+) - (IN-)] is converted.
At the end of the conversion, the positive input con-
nects back to IN+ and C_HOLD charges to the input sig-
nal.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t_ACQ, is the maximum time the device takes to acquire
the signal and is also the minimum time needed for the
signal to be acquired. It is calculated by the following
equation:
t_ACQ = 9 ✕ (R_S + R_IN) ✕ 12pF
where R_IN = 800Ω, R_S = the source impedance of the
input signal; t_ACQ is never less than 468ns (MAX1280)
or 625ns (MAX1281). Note that source impedances
below 2kΩ do not significantly affect the ADC’s AC per-
formance.
Input Bandwidth
The ADC’s input tracking circuitry has a 6MHz
(MAX1280) or 3MHz (MAX1281) small-signal band-
width, so it is possible to digitize high-speed transient
events and measure periodic signals with bandwidths
exceeding the ADC’s sampling rate by using under-
sampling techniques. To avoid high-frequency signals
being aliased into the frequency band of interest, anti-
alias filtering is recommended.
Analog Input Protection
Internal protection diodes, which clamp the analog
input to V_DD1 and GND, allow the channel input pins to
swing from GND - 0.3V to V_DD1 + 0.3V without dam-
age. However, for accurate conversions near full scale,
the inputs must not exceed V_DD1 by more than 50mV or
be lower than GND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, do not allow the input current to exceed 2mA.
Quick Look
To quickly evaluate the MAX1280/MAX1281’s analog
performance, use the circuit of Figure 5. The MAX1280/
MAX1281 require a control byte to be written to DIN
before each conversion. Connecting DIN to V_DD2 feeds
in control bytes of $FF (HEX), which trigger single-
ended unipolar conversions on CH7 without powering
down between conversions. The SSTRB output pulses
OSCILLOSCOPE
0V TO
2.500V
ANALOG
INPUT 0.01µF
MAX1280 ^VDD1
MAX1281 ^VDD2
CH7
GND
COM
CS
0.1µF
+3V or +5V
10µF
SCLK
SSTRB
REFADJ
SCLK
DOUT*
0.01µF
DIN
TO V_DD2
EXTERNAL CLOCK
2.5V
REF
DOUT
SSTRB
4.7µF
SHDN
TO V_DD2
CH1
CH2
CH3 CH4
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FFF (HEX)
Figure 5. Quick-Look Circuit
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