LTC3717 Datasheet, PDF (9/20 Pages) Linear Technology – Wide Operating Range, No RSENSE Step-Down Controller for DDR/QDR Memory Termination

LTC3717
APPLICATIO S I FOR ATIO
the LTC3717 and external component values and a good
guide for selecting the sense resistance is:
R_SENSE
=
10
V_RNG
• I_OUT(MAX)
An external resistive divider from INTV_CC can be used to set
the voltage of the V_RNG pin between 0.5V and 2V resulting
in nominal sense voltages of 50mV to 200mV. Additionally,
the V_RNG pin can be tied to SGND or INTV_CC in which case
the nominal sense voltage defaults to 70mV or 140mV,
respectively. The maximum allowed sense voltage is about
1.3 times this nominal value for positive output current and
1.7 times the nominal value for negative output current.
Power MOSFET Selection
The LTC3717 requires two external N-channel power MOS-
FETs, one for the top (main) switch and one for the bottom
(synchronous) switch. Important parameters for the power
MOSFETs are the breakdown voltage V_(BR)DSS, threshold
voltage V_(GS)TH, on-resistance R_DS(ON), reverse transfer
capacitance C_RSS and maximum current I_DS(MAX).
The gate drive voltage is set by the 5V INTV_CC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC3717 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value R_DS(ON)(MAX) at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
R_DS(ON)(MAX)
=
R_SENSE
ρ_T
The ρ_T term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρ_T = 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. During LTC3717’s normal operation, the
duty cycles for the MOSFETs are:
D_TOP
=
V_OUT
V_IN
D_BOT
=
V_IN
– V_OUT
V_IN
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
P_TOP = D_TOP I_OUT(MAX)2 ρ_T(TOP) R_DS(ON)(MAX)
+ k V_IN2 I_OUT(MAX) C_RSS f
P_BOT = D_BOT I_OUT(MAX)2 ρ_T(BOT) R_DS(ON)(MAX)
Both MOSFETs have I²R losses and the top MOSFET
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A^–1 can
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
2.0
1.5
1.0
0.5
0
– 50
0
50
100
150
JUNCTION TEMPERATURE (°C)
3717 F02
Figure 2. R_DS(ON) vs. Temperature
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC3717 applications is deter-
mined implicitly by the one-shot timer that controls the
sn3717 3717fs
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