LTC3717 Datasheet, PDF (15/20 Pages) Linear Technology – Wide Operating Range, No RSENSE Step-Down Controller for DDR/QDR Memory Termination

LTC3717
APPLICATIO S I FOR ATIO
(This is typically the case, since V_IN is derived from
another DC/DC converter.) The ripple voltage will be only:
∆V_OUT(RIPPLE) = ∆I_L(MAX) (ESR)
= (4A) (0.013Ω) = 52mV
However, a 0A to 10A load step will cause an output
change of up to:
∆V_OUT(STEP) = ∆I_LOAD (ESR) = (10A) (0.013Ω) = 130mV
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place C_IN, C_OUT, MOSFETs, D1 and inductor all in one
compact area. It may help to have some components on
the bottom side of the board.
• Place LTC3717 chip with pins 9 to 16 facing the power
components. Keep the components connected to pins
1 to 8 close to LTC3717 (noise sensitive components).
• Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC3717.
Use several bigger vias for power components.
• Use compact plane for switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
• Use planes for V_IN and V_OUT to maintain good voltage
filtering and to keep power losses low.
C_SS
0.1µF
R3 R4
11k 39k
C_C1
470pF
R_C
20k
C_C2
100pF
C_ON 0.01µF
R_ON
511k
LTC3717
1 _RUN/SS
16
BOOST
R_PG
100k _{2 PGOOD}
15
TG
3 _VRNG
4 _ITH
5 _SGND
14
SW
13
PGND
12
BG
6 _ION
11
INTV_CC
7 _VFB
10
V_CC
8 _VREF
9
EXTV_CC
(OPT)
0.1µF
10Ω
D_B
CMDSH-3
C_B
0.22µF
C_VCC
4.7µF
R_F
1Ω
C_F
0.1µF
M1
Si4874
M2
Si4874
D2
B320A
L1
0.68µH
D1
B320A
V_EXT 5V
C_IN, C_OUT1-2: CORNELL DUBILIER ESRE181E04B
L1: SUMIDA CEP125-0R68MC-H
Figure 6. Design Example: 1.25V/±10A at 250kHz
C_IN +
22µF
C_IN ^{VIN = 2.5V}
180µF
6.3V
4V
X7R
×2 V_OUT
1.25V
+ ^COUT1-2
270µF
±10A
C_OUT3
22µF
2V
6.3V
×2
X7R
3717 F06a
sn3717 3717fs
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