LTC4417_15 Datasheet, PDF (8/32 Pages) Linear Technology – Prioritized PowerPat Controller

LTC4417
Functional Block Diagram
SHDN
V_LDO
I_SHDN
2µA
D2
1V
V_LDO
I_EN
2µA
EN
D3
V_LDO
1V
I_LIM
5µA
V_LDO
+ _SHDN
–
V_LDO
+
EN
–
V1 V2 V3
V_BESTGEN
P1
VB_LDO
V1
P2
V2
P3
V3
P4
V_BEST P5
BANDGAP
UVLO
LDO
LDO
PRIORITIZER
V_LDO
SHDN
M4
HYS
CURRENT SENSE/8
V_LDO
OTA
0.5V
I_HYS/8
0.24V
V_LDO
+
HYS
–
30mV
EXTERNAL
HYS
PRIORITIZED
NONOVERLAP
CONTROL
LOGIC
VB_LDO
2.4V
V_OUT
V_OUT
V_LDO
I_CAS
20µA
V_LDO
M2
D1
CAS
M3
GND
V_LDO
HYSTERESIS
UV1
+
UV2
1V –
UV
UV3
V_LDO
+
256ms
TIMER
1V +
OV1
–
OV2
OV
OV3
VALID1
VALID2 _M1
VALID3
CHANNEL 1
CHANNEL 2
CHANNEL 3
CH1
VALID
VS1 _120mV
+–
V1
REV
V2
V3
VS1
VS1
V_GS
+–
350mV
VS2
DZ1
6.2V
VS3
G1
GATE
G2
DRIVER
G3
4417 BD
4417f
8