LTC4417_15 Datasheet, PDF (20/32 Pages) Linear Technology – Prioritized PowerPat Controller

LTC4417
Applications Information
Disabling All Channels with EN and SHDN
Driving EN below 1V turns off all external back-to-back
P-channel MOSFETs but does not interrupt input supply
monitoring or reset the 256ms timers. Driving EN above
1V enables the highest valid priority channel. This feature
is essential in cascading applications. For applications
where EN could be driven below ground, limit the current
from EN with a 10k resistor.
Forcing SHDN below 0.8V turns off all external back-to-back
P-channel MOSFETs, disables all OV and UV comparators
and resets all 256ms timers. VALID1, VALID2 and VALID3
release high to indicate all inputs are invalid, regardless
of the input supply condition. The LTC4417 enters into a
low current state, consuming only 15µA. When SHDN is
released or driven above 0.8V, the LTC4417 is required
to revalidate the input supplies before connecting the
inputs to V_OUT, as described in the Operation section. For
applications where SHDN could be driven below ground,
limit the current from SHDN with a 10k resistor.
Cascading
The LTC4417 can be cascaded to prioritize four or more
input supplies. To prioritize four to six supplies, use two
LTC4417s with their V_OUT pins connected together and the
master LTC4417’s CAS connected to the slave LTC4417’s
EN as shown in Figure 12. The first LTC4417 to validate an
input will soft-start the common output. Once the output
is above 2.4V, power will be drawn from V_OUT by the other
LTC4417 regardless of its input supply conditions.
When the master LTC4417 wants to connect one of its
input supplies to the V_OUT, it simultaneously initiates a
channel turn on and pulls its CAS pin low to force the slave
LTC4417 to disconnect its channels. A small amount of
reverse conduction may occur in this case. The amount
of cross conduction will depend on the total turn-on delay
of the master channel compared with the turn-off delay
of the slave channel. Care should be taken to ensure the
connection between CAS and EN is as short as possible,
to minimize the capacitance and hence the turn-off delay
of the slave channel.
When all of the inputs to the master LTC4417 are invalid,
the master confirms that all its inputs are disconnected
20
IRF7324
M1
M2
C_{VS1_1}
0.1µF
VS1 G1
V_OUT
LTC4417
MASTER
EN
SHDN
CAS
DISABLE ALL CHANNELS
SHDN MASTER
IRF7324
M3
M4
C_{VS1_2}
0.1µF
VS1 G1
V_OUT
LTC4417
SLAVE
EN
SHDN
CAS
+
C_L
V_OUT
47µF
4417 F12
Figure 12. Cascading Application
from V_OUT before releasing CAS. CAS is pulled to the in-
ternal V_LDO rail with a 20µA current source, allowing the
slave LTC4417 to connect its highest valid priority channel
to V_OUT. Confirmation that all channels are off before the
slave is allowed to connect its channel to V_OUT prevents
cross conduction from occurring.
Driving the master LTC4417’s EN low forces both master
and slave to disconnect all channels from the common
output and continue monitoring the input supplies. Driv-
ing the master LTC4417’s SHDN low places it in to a low
current state. While in the low current state, all of its chan-
nels are disconnected and CAS is pulled high with a 20µA
current source, allowing the slave LTC4417 to become the
4417f