LTC4417_15 Datasheet, PDF (4/32 Pages) Linear Technology – Prioritized PowerPat Controller

LTC4417
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. For all tests, V1 = VS1, V2 = VS2, V3 = VS3. Unless otherwise noted,
V1 = V2 = V3 = V_OUT = 12V, HYS = GND.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Input/Output Pins
V_VALID(OL)
t_pVALID(OFF)
V_CAS(OH)
V_CAS(OL)
I_CAS
t_pCAS(EN)
V_EN(THR)
V_SHDN(THR)
V_{SHDN_EN(HYS)}
I_{SHDN_EN}
I_LEAK
VALID1 to VALID3 Output Low Voltage
VALID1 to VALID3 Delay OFF From OV/UV Fault
CAS Output High Voltage
CAS Output Low Voltage
CAS Pull-Up Current
CAS Delay from V_G(OFF)
EN Threshold Voltage
SHDN Threshold Voltage
SHDN, EN Threshold Hysteresis
SHDN, EN Pull-Up Current
SHDN, EN, VALID1 to VALID3, CAS Leakage
Current
I = 1mA, (V1 to V3) = 2.5V, V_OUT = 0V
I = –1µA
I = 1mA
SHDN = 0V, CAS = 1V
V_OUT = 11V
EN Rising
SHDN Rising
SHDN = EN = 0V
SHDN = EN = (VALID1 to VALID3) = 36V,
CAS = 5.5V
l
0.25 0.55
V
l5
8
13
µs
l 1.4
2
3
V
l
0.2 0.4
V
l –6 –20 –40
µA
l 0.4 0.7 1.3
µs
l 0.6
1
1.4
V
l 0.4 0.8 1.2
V
100
mV
l –0.5 –2
–5
µA
l
±1
µA
OV, UV Protection Circuitry
V_{OV_UV(THR)} OV1 to OV3, UV1 to UV3 Comparator Threshold V_OUT = 11V, OV1 to OV3 Rising, UV1 to UV3 l 0.985 1 1.015
V
Falling
V_{OV_UV(HYS)} OV1 to OV3, UV1 to UV3 Comparator
Hysteresis
V_OUT = 11V
l 15
30
45
mV
I_{UV_OV(LEAK)}
I_{OV_UV(MIN)}
I_{OV_UV(MAX)}
V_HYS
t_VALID
OV1 to OV3, UV1 to UV3 Leakage Current
Minimum External Hysteresis Current
Maximum External Hysteresis Current
HYS Voltage
V1 to V3 Validation Time
OV1 to OV3 = 1.015V, UV1 to UV3 = 0.985V l
±20
nA
I_HYS = –400nA
I_HYS = –4µA
I_HYS = –4µA
l 35
50
75
nA
l 420 520 620
nA
l 470 495 520 mV
100 256 412
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: Each V1 to V3 supply current specification includes current into
the corresponding VS1 to VS3 for the channel(s) being tested.
Note 4: Specification represents the total diode-ORed current of V1 to V3
input supplies, selecting the highest voltage as the input source. If two
input supplies are similar in voltage and higher than the remaining input
supply voltage, the current is split evenly between the two higher voltage
supplies. Current is split evenly if all supplies are equal.
Note 5: Falling edge of G1 to G3 measured from 11V to 8V.
Note 6: Rising edge of G1 to G3 measured from 7V to 11V.
Note 7: UV1 driven below V_OV,UV(THR). Time is measured from respective
rising edge G1 to G3 crossing (VS1 to VS3) – 3V to next valid priority
falling edge G1 to G3 crossing (VS1 to VS3) – 3V.
4417f
4