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LTC3729L-6 Datasheet, PDF (8/28 Pages) Linear Technology – PolyPhase, Synchronous Step-Down Switching Regulator
LTC3729L-6
PI FU CTIO S
SGND (Pin 6): Signal Ground, common to both control-
lers, must be routed separately from the input switched
current ground path to the common (–) terminal(s) of the
COUT capacitor(s).
VDIFFOUT (Pin 7): Output of a Differential Amplifier that
provides true remote output voltage sensing. This pin
normally drives an external resistive divider that sets the
output voltage.
VOS–, VOS+ (Pins 8, 9): Inputs to an Operational Amplifier.
Internal precision resistors capable of being electronically
switched in or out can configure it as a differential ampli-
fier or an uncommitted op amp.
NC (Pins 10, 16, 29, 32): Not Connected.
SENSE2–, SENSE1– (Pins 11, 31): The (–) Input to the
Differential Current Comparators.
SENSE2+, SENSE1+ (Pins 12, 30): The (+) Input to the
Differential Current Comparators. The ITH pin voltage and
built-in offsets between SENSE– and SENSE+ pins in
conjunction with RSENSE set the current trip threshold.
PGOOD (Pin 13): Open-Drain Logic Output. PGOOD is
pulled to ground when the voltage on the EAIN pin is not
within ±10% of its set point. An internal timer masks the
PGOOD from going low for 100µs in OV and UV conditions.
TG2, TG1 (Pins 14, 26): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTVCC superim-
posed on the switch node voltage SW.
SW2, SW1 (Pins 15, 25): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to VIN.
BOOST2, BOOST1 (Pins 17, 24): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the Boost and Switch pins and Schottky diodes
are tied between the Boost and INTVCC pins. Voltage swing
at the Boost pins is from INTVCC to (VIN + INTVCC).
BG2, BG1 (Pins 18, 22): High Current Gate Drives for
Bottom Synchronous N-Channel MOSFETS. Voltage swing
at these pins is from ground to INTVCC.
PGND (Pin 19): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of
CIN.
INTVCC (Pin 20): Output of the Internal 5V Linear Low
Dropout Regulator and the EXTVCC Switch. The driver and
control circuits are powered from this voltage source.
Decouple to power ground with a 1µF ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7µF
additional tantalum or other low ESR capacitor.
EXTVCC (Pin 21): External Power Input to an Internal
Switch . This switch closes and supplies INTVCC, bypass-
ing the internal low dropout regulator whenever EXTVCC is
higher than 4.7V. See EXTVCC Connection in the Applica-
tions Information section. Do not exceed 7V on this pin
and ensure VEXTVCC ≤ VINTVCC.
VIN (Pin 23): Main Supply Pin. Should be closely decoupled
to the IC’s signal ground pin.
CLKOUT (Pin 27): Output Clock Signal available to
daisychain other controller ICs for additional MOSFET
driver stages/phases.
RUN/SS (Pin 28): Combination of Soft-Start, Run Control
Input and Short-Circuit Detection Timer. A capacitor to
ground at this pin sets the ramp time to full current output.
Forcing this pin below 0.8V causes the IC to shut down all
internal circuitry. All functions are disabled in shutdown.
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