LTC3729L-6 Datasheet, PDF (12/28 Pages) Linear Technology – PolyPhase, Synchronous Step-Down Switching Regulator

LTC3729L-6
APPLICATIO S I FOR ATIO
R_SENSE Selection For Output Current
R_{SENSE1, 2} are chosen based on the required output
current. The LTC3729L-6 current comparator has a maxi-
mum threshold of 75mV/R_SENSE and an input common
mode range of SGND to 1.1(INTV_CC). The current com-
parator threshold sets the peak inductor current, yielding
a maximum average output current I_MAX equal to the peak
value less half the peak-to-peak ripple current, ∆I_L.
Allowing a margin for variations in the LTC3729L-6 and
external component values yields:
R_SENSE = (50mV/I_MAX)N
where N = number of stages.
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to
internal slope compensation required to meet stability
criterion for buck regulators operating at greater than 50%
duty factor. A curve is provided to estimate this reduction
in peak output current level depending upon the operating
duty factor.
Operating Frequency
The LTC3729L-6 uses a constant frequency, phase-lock-
able architecture with the frequency determined by an
internal capacitor. This capacitor is charged by a fixed
current plus an additional current which is proportional to
the voltage applied to the PLLFLTR pin. Refer to Phase-
Locked Loop and Frequency Synchronization in the Appli-
cations Information section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure␣ 2. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency (see Efficiency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation and Output Ripple Current
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
12
2.5
T_A = 25°C
2.0
1.5
1.0
0.5
0
200
300
400
500
600
OPERATING FREQUENCY (kHz)
3729L-6 F02
Figure 2. Operating Frequency vs V_PLLFLTR
MOSFET gate charge and transition losses. In addition to
this basic tradeoff, the effect of inductor value on ripple
current and low current operation must also be consid-
ered. The PolyPhase approach reduces both input and
output ripple currents while optimizing individual output
stages to run at a lower fundamental frequency, enhancing
efficiency.
The inductor value has a direct effect on ripple current. The
inductor ripple current ∆I_L per individual section, N,
decreases with higher inductance or frequency and in-
creases with higher V_IN or V_OUT:
∆I_L
=
V_OUT
fL


1−
V_OUT
V_IN


where f is the individual output stage operating frequency.
In a PolyPhase converter, the net ripple current seen by the
output capacitor is much smaller than the individual
inductor ripple currents due to the ripple cancellation. The
details on how to calculate the net output ripple current
can be found in Application Note 77.
Figure 3 shows the net ripple current seen by the output
capacitors for the different phase configurations. The
output ripple current is plotted for a fixed output voltage as
the duty factor is varied between 10% and 90% on the
x-axis. The output ripple current is normalized against the
inductor ripple current at zero duty factor. The graph can
be used in place of tedious calculations. As shown in
Figure␣ 3, the zero output ripple current is obtained when:
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