LTC3826-1 Datasheet, PDF (7/32 Pages) Linear Technology – 30μA IQ, Dual, 2-Phase Synchronous Step-Down Controller

TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold
vs Temperature
4.2
4.1
4.0
RISING
3.9
3.8
3.7
3.6
FALLING
3.5
3.4
3.3
3.2
–45 –30 –15 0 15 30 45 60 75 90
TEMPERATURE (°C)
38261 G25
Oscillator Frequency
vs Input Voltage
392
390
388
386
384
382
380
5
10 15 20 25 30 35
INPUT VOLTAGE (V)
38261 G26
LTC3826-1
Shutdown Current
vs Temperature
6
5
4
3
2
1
0
–45 –30 –15 0 15 30 45 60 75 90
TEMPERATURE (°C)
38261 G27
PIN FUNCTIONS
I_TH1, I_TH2 (Pins 1, 13): Error Amplifier Outputs and
Switching Regulator Compensation Points. Each associ-
ated channel’s current comparator trip point increases
with this control voltage.
V_FB1, V_FB2 (Pins 2, 12): Receives the remotely sensed
feedback voltage for each controller from an external
resistive divider across the output.
SENSE1⁺, SENSE2⁺ (Pins 3, 11): The (+) Input to the
Differential Current Comparators. The I_TH pin voltage and
controlled offsets between the SENSE^– and SENSE⁺ pins in
conjunction with R_SENSE set the current trip threshold.
SENSE1^–, SENSE2^– (Pins 4, 10): The (–) Input to the
Differential Current Comparators.
PLLLPF (Pin 5): The phase-locked loop’s lowpass filter is
tied to this pin when synchronizing to an external clock.
Alternatively, tie this pin to GND, INTV_CC or leave floating to
select 250kHz, 530kHz or 390kHz switching frequency.
PLLIN/MODE (Pin 6): External Synchronization Input to
Phase Detector and Forced Continuous Control Input. When
an external clock is applied to this pin, the phase-locked
loop will force the rising TG1 signal to be synchronized
with the rising edge of the external clock. In this case, an
R-C filter must be connected to the PLLLPF pin. When
not synchronizing to an external clock, this input, which
acts on both controllers, determines how the LTC3826-1
operates at light loads. Pulling this pin below 0.7V selects
Burst Mode operation. Tying this pin to INTV_CC forces
continuous inductor current operation. Tying this pin to
a voltage greater than 0.9V and less than INTV_CC –1.2V
selects pulse skipping operation.
SGND (Pin 7): Small-signal Ground common to both
controllers, must be routed separately from high cur-
rent grounds to the common (–) terminals of the C_IN
capacitors.
38261fb
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