LTC3826-1 Datasheet, PDF (24/32 Pages) Linear Technology – 30μA IQ, Dual, 2-Phase Synchronous Step-Down Controller

LTC3826-1
APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 11. Figure 12 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain
connection at C_IN? Do not attempt to split the input
decoupling for the two channels as it can cause a large
resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return
of C_INTVCC must return to the combined C_OUT (–) ter-
minals. The path formed by the top N-channel MOSFET,
Schottky diode and the C_IN capacitor should have short
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
3. Do the LTC3826-1 V_FB pins’ resistive dividers connect to
the (+) terminals of C_OUT? The resistive divider must be
connected between the (+) terminal of C_OUT and signal
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
24
I_TH1
TRACK/SS1
V_FB1
SENSE1⁺
PGOOD1
TG1
SENSE1^–
SW1
PLLLPF
BOOST1
f_IN
PLLIN/MODE
BG1
SGND
V_IN
RUN1
PGND
LTC3826-1
RUN2
EXTV_CC
SENSE2^–
INTV_CC
SENSE2⁺
BG2
V_FB2
BOOST2
I_TH2
SW2
TRACK/SS2
TG2
R_PU
V_PULL-UP
(<8.5V)
PGOOD1
L1
R_SENSE
C_B1
C_VIN
C_INTVCC
C_B2
M1
M2
1μF
CERAMIC
R_IN
V_IN
C_IN
1μF
CERAMIC
M3
M4
D1
C_OUT1
+
+
C_OUT2
D2
R_SENSE
L2
38261 F11
V_OUT1
GND
V_OUT2
Figure 11. LTC3826-1 Recommended Printed Circuit Layout Diagram
38261fb