LTC3826-1 Datasheet, PDF (14/32 Pages) Linear Technology – 30μA IQ, Dual, 2-Phase Synchronous Step-Down Controller

LTC3826-1
APPLICATIONS INFORMATION
use of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ΔI_L decreases with higher
inductance or frequency and increases with higher V_IN:

I_L
=
1
(f)(L)
V_OUT


1–
V_OUT
V_IN


Accepting larger values of ΔI_L allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ΔI_L = 0.3(I_MAX). The maximum
ΔI_L occurs at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
10% of the current limit determined by R_SENSE. Lower
inductor values (higher ΔI_L) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite or mo-
lypermalloy cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode (Optional)
Selection
Two external power MOSFETs must be selected for each
controller in the LTC3826-1: one N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV_CC voltage.
This voltage is typically 5V during start-up (see EXTV_CC Pin
Connection). Consequently, logic-level threshold MOSFETs
must be used in most applications. The only exception
is if low input voltage is expected (V_IN < 5V); then, sub-
logic level threshold MOSFETs (V_GS(TH) < 3V) should be
used. Pay close attention to the BV_DSS specification for
the MOSFETs as well; most of the logic level MOSFETs are
limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R_DS(ON), Miller capacitance C_MILLER, input
voltage and maximum output current. Miller capacitance,
C_MILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C_MILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in V_DS. This result is
then multiplied by the ratio of the application applied V_DS
to the Gate charge curve specified V_DS. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main
Switch
Duty
Cycle
=
V_OUT
V_IN
Synchronous
Switch
Duty
Cycle
=
V_IN
– V_OUT
V_IN
38261fb
14